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Date:      Mon, 26 Aug 2024 18:03:21 GMT
From:      John Baldwin <jhb@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org
Subject:   git: 4d2e2e1b440e - stable/14 - nvme: Use the NVMEF macro to construct fields
Message-ID:  <202408261803.47QI3L6j042839@gitrepo.freebsd.org>

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The branch stable/14 has been updated by jhb:

URL: https://cgit.FreeBSD.org/src/commit/?id=4d2e2e1b440e339d679f2fa9e146767d98f8aea8

commit 4d2e2e1b440e339d679f2fa9e146767d98f8aea8
Author:     John Baldwin <jhb@FreeBSD.org>
AuthorDate: 2024-01-29 19:01:13 +0000
Commit:     John Baldwin <jhb@FreeBSD.org>
CommitDate: 2024-08-26 17:27:08 +0000

    nvme: Use the NVMEF macro to construct fields
    
    Reviewed by:    chuck, imp
    Sponsored by:   Chelsio Communications
    Differential Revision:  https://reviews.freebsd.org/D43605
    
    (cherry picked from commit 5650bd3fe8eff1043ef3df33b5bdd7b24b5f2bc0)
---
 sys/dev/nvme/nvme_ctrlr.c | 20 ++++++++++----------
 sys/dev/nvme/nvme_ns.c    |  3 ++-
 sys/dev/nvme/nvme_qpair.c | 10 +++++-----
 3 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/sys/dev/nvme/nvme_ctrlr.c b/sys/dev/nvme/nvme_ctrlr.c
index 3ef5a2b51544..0004895d6691 100644
--- a/sys/dev/nvme/nvme_ctrlr.c
+++ b/sys/dev/nvme/nvme_ctrlr.c
@@ -375,25 +375,25 @@ nvme_ctrlr_enable(struct nvme_controller *ctrlr)
 	qsize = ctrlr->adminq.num_entries - 1;
 
 	aqa = 0;
-	aqa = (qsize & NVME_AQA_REG_ACQS_MASK) << NVME_AQA_REG_ACQS_SHIFT;
-	aqa |= (qsize & NVME_AQA_REG_ASQS_MASK) << NVME_AQA_REG_ASQS_SHIFT;
+	aqa |= NVMEF(NVME_AQA_REG_ACQS, qsize);
+	aqa |= NVMEF(NVME_AQA_REG_ASQS, qsize);
 	nvme_mmio_write_4(ctrlr, aqa, aqa);
 
 	/* Initialization values for CC */
 	cc = 0;
-	cc |= 1 << NVME_CC_REG_EN_SHIFT;
-	cc |= 0 << NVME_CC_REG_CSS_SHIFT;
-	cc |= 0 << NVME_CC_REG_AMS_SHIFT;
-	cc |= 0 << NVME_CC_REG_SHN_SHIFT;
-	cc |= 6 << NVME_CC_REG_IOSQES_SHIFT; /* SQ entry size == 64 == 2^6 */
-	cc |= 4 << NVME_CC_REG_IOCQES_SHIFT; /* CQ entry size == 16 == 2^4 */
+	cc |= NVMEF(NVME_CC_REG_EN, 1);
+	cc |= NVMEF(NVME_CC_REG_CSS, 0);
+	cc |= NVMEF(NVME_CC_REG_AMS, 0);
+	cc |= NVMEF(NVME_CC_REG_SHN, 0);
+	cc |= NVMEF(NVME_CC_REG_IOSQES, 6); /* SQ entry size == 64 == 2^6 */
+	cc |= NVMEF(NVME_CC_REG_IOCQES, 4); /* CQ entry size == 16 == 2^4 */
 
 	/*
 	 * Use the Memory Page Size selected during device initialization.  Note
 	 * that value stored in mps is suitable to use here without adjusting by
 	 * NVME_MPS_SHIFT.
 	 */
-	cc |= ctrlr->mps << NVME_CC_REG_MPS_SHIFT;
+	cc |= NVMEF(NVME_CC_REG_MPS, ctrlr->mps);
 
 	nvme_ctrlr_barrier(ctrlr, BUS_SPACE_BARRIER_WRITE);
 	nvme_mmio_write_4(ctrlr, cc, cc);
@@ -1601,7 +1601,7 @@ nvme_ctrlr_shutdown(struct nvme_controller *ctrlr)
 
 	cc = nvme_mmio_read_4(ctrlr, cc);
 	cc &= ~NVMEM(NVME_CC_REG_SHN);
-	cc |= NVME_SHN_NORMAL << NVME_CC_REG_SHN_SHIFT;
+	cc |= NVMEF(NVME_CC_REG_SHN, NVME_SHN_NORMAL);
 	nvme_mmio_write_4(ctrlr, cc, cc);
 
 	timeout = ticks + (ctrlr->cdata.rtd3e == 0 ? 5 * hz :
diff --git a/sys/dev/nvme/nvme_ns.c b/sys/dev/nvme/nvme_ns.c
index c172663f75a3..9eb808f81a48 100644
--- a/sys/dev/nvme/nvme_ns.c
+++ b/sys/dev/nvme/nvme_ns.c
@@ -287,7 +287,8 @@ nvme_bio_child_inbed(struct bio *parent, int bio_error)
 		bzero(&parent_cpl, sizeof(parent_cpl));
 		if (parent->bio_flags & BIO_ERROR) {
 			parent_cpl.status &= ~NVMEM(NVME_STATUS_SC);
-			parent_cpl.status |= (NVME_SC_DATA_TRANSFER_ERROR) << NVME_STATUS_SC_SHIFT;
+			parent_cpl.status |= NVMEF(NVME_STATUS_SC,
+			    NVME_SC_DATA_TRANSFER_ERROR);
 		}
 		nvme_ns_bio_done(parent, &parent_cpl);
 	}
diff --git a/sys/dev/nvme/nvme_qpair.c b/sys/dev/nvme/nvme_qpair.c
index e087abcb2654..ce2f30aaa5ba 100644
--- a/sys/dev/nvme/nvme_qpair.c
+++ b/sys/dev/nvme/nvme_qpair.c
@@ -494,9 +494,9 @@ nvme_qpair_manual_complete_tracker(
 
 	cpl.sqid = qpair->id;
 	cpl.cid = tr->cid;
-	cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT;
-	cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT;
-	cpl.status |= (dnr & NVME_STATUS_DNR_MASK) << NVME_STATUS_DNR_SHIFT;
+	cpl.status |= NVMEF(NVME_STATUS_SCT, sct);
+	cpl.status |= NVMEF(NVME_STATUS_SC, sc);
+	cpl.status |= NVMEF(NVME_STATUS_DNR, dnr);
 	/* M=0 : this is artificial so no data in error log page */
 	/* CRD=0 : this is artificial and no delayed retry support anyway */
 	/* P=0 : phase not checked */
@@ -512,8 +512,8 @@ nvme_qpair_manual_complete_request(struct nvme_qpair *qpair,
 
 	memset(&cpl, 0, sizeof(cpl));
 	cpl.sqid = qpair->id;
-	cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT;
-	cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT;
+	cpl.status |= NVMEF(NVME_STATUS_SCT, sct);
+	cpl.status |= NVMEF(NVME_STATUS_SC, sc);
 
 	error = nvme_completion_is_error(&cpl);
 



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