Date: Thu, 31 Jul 1997 12:47:07 +0930 (CST) From: Michael Smith <msmith@atrad.adelaide.edu.au> To: se@FreeBSD.ORG (Stefan Esser) Cc: gallatin@cs.duke.edu, freebsd-current@FreeBSD.ORG Subject: Re: code talks: announcing EIDE bus master patches Message-ID: <199707310317.MAA25355@genesis.atrad.adelaide.edu.au> In-Reply-To: <19970730220038.02422@mi.uni-koeln.de> from Stefan Esser at "Jul 30, 97 10:00:38 pm"
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Stefan Esser stands accused of saying: > > (*) PCI device == a Myrinet M2F-PCI32 card. This is a programmable > > gigabit networking card. It has a 256k bank of SRAM on the card, and > > is very good for doing things like measuring PCI b/w. The tests were > > done from user space operating on mmap'ed device memory & a kernel > > allocated chunk of RAM to do DMA xfers to/from. It also runs IP > > traffic at better than 300Mb/sec. > > This was a memory mapped device buffer ? > > That's *very* different from an I/O port, and you should be able > to copy data to that SRAM at a much higher rate than 8 or 13MB/s! If I read the AMCC PCI matchmaker databook correctly, PIO to a memory-mapped buffer is likely to be severely affected by whether the PCI bridge in question supports cache line read/write operations. Is this a potential issue here? -- ]] Mike Smith, Software Engineer msmith@gsoft.com.au [[ ]] Genesis Software genesis@gsoft.com.au [[ ]] High-speed data acquisition and (GSM mobile) 0411-222-496 [[ ]] realtime instrument control. (ph) +61-8-8267-3493 [[ ]] Unix hardware collector. "Where are your PEZ?" The Tick [[
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