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Date:      Fri, 18 Jan 2019 15:58:32 +0000 (UTC)
From:      David Bright <dab@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org
Subject:   svn commit: r343148 - stable/12/sys/dev/asmc
Message-ID:  <201901181558.x0IFwWM1058701@repo.freebsd.org>

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Author: dab
Date: Fri Jan 18 15:58:32 2019
New Revision: 343148
URL: https://svnweb.freebsd.org/changeset/base/343148

Log:
  MFC r342770:
  
  asmc: Patch to add MacBook Pro 9,2 support
  
  PR:		211513
  Submitted by:	William Theesfeld Jr <wtheesfeld@mailbox.org>
  Reported by:	William Theesfeld Jr <wtheesfeld@mailbox.org>

Modified:
  stable/12/sys/dev/asmc/asmc.c
  stable/12/sys/dev/asmc/asmcvar.h
Directory Properties:
  stable/12/   (props changed)

Modified: stable/12/sys/dev/asmc/asmc.c
==============================================================================
--- stable/12/sys/dev/asmc/asmc.c	Fri Jan 18 13:43:11 2019	(r343147)
+++ stable/12/sys/dev/asmc/asmc.c	Fri Jan 18 15:58:32 2019	(r343148)
@@ -231,6 +231,12 @@ struct asmc_model asmc_models[] = {
 	},
 
 	{
+	 "MacBookPro9,2", "Apple SMC MacBook Pro (mid 2012)",
+	  ASMC_SMS_FUNCS_DISABLED, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
+	  ASMC_MBP9_TEMPS, ASMC_MBP9_TEMPNAMES, ASMC_MBP9_TEMPDESCS
+	},
+
+	{
 	  "MacBookPro11,2", "Apple SMC MacBook Pro Retina Core i7 (2013/2014)",
 	  ASMC_SMS_FUNCS_DISABLED, ASMC_FAN_FUNCS2, ASMC_LIGHT_FUNCS,
 	  ASMC_MBP112_TEMPS, ASMC_MBP112_TEMPNAMES, ASMC_MBP112_TEMPDESCS

Modified: stable/12/sys/dev/asmc/asmcvar.h
==============================================================================
--- stable/12/sys/dev/asmc/asmcvar.h	Fri Jan 18 13:43:11 2019	(r343147)
+++ stable/12/sys/dev/asmc/asmcvar.h	Fri Jan 18 15:58:32 2019	(r343148)
@@ -257,6 +257,27 @@ struct asmc_softc {
 				  "TMBS", "TP0P", "TPCD", "TW0P", "Th1H", \
 				  "Th2H", "Tm0P", "Ts0P", "Ts0S" }
 
+#define ASMC_MBP9_TEMPS		{ "Ts0P", "Ts0S", "TA0P", "TB1T", "TB2T", \
+				  "TB0T", "TC1C", "TC2C", "TC0E", "TC0F", \
+				  "TC0J", "TC0P", "TCFC", "TCGC", "TCSA", \
+				  "TCTD", "TCXC", "TG1D", "TM0P", "TM0S", \
+				  "TPCD", NULL }
+
+#define ASMC_MBP9_TEMPNAMES	{ "Ts0P", "Ts0S", "TA0P", "TB1T", "TB2T", \
+				  "TB0T", "TC1C", "TC2C", "TC0E", "TC0F", \
+				  "TC0J", "TC0P", "TCFC", "TCGC", "TCSA", \
+				  "TCTD", "TCXC", "TG1D", "TM0P", "TM0S", \
+				  "TPCD" }
+
+#define ASMC_MBP9_TEMPDESCS	{ "Palm Rest", "Memory Proximity", "Airflow 1", \
+				  "Battery 1", "Battery 2", "Battery TS_MAX", \
+				  "CPU Core 1", "CPU Core 2", "CPU1", "CPU1", \
+				  "TC0J", "CPU 1 Proximity", "TCFC", \
+				  "PECI GPU", "PECI SA", "TCTD", "PECI CPU", \
+				  "GPU Die", "Memory Bank A1", "Memory Module A1", \
+				  "PCH Die" }
+
+
 #define ASMC_MBP112_TEMPS	{ "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \
 				  "TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \
 				  "TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \



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