Date: Sat, 12 May 2018 15:34:35 +0000 (UTC) From: Ed Maste <emaste@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r333569 - head/usr.sbin/cpucontrol Message-ID: <201805121534.w4CFYZn5031242@repo.freebsd.org>
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Author: emaste Date: Sat May 12 15:34:35 2018 New Revision: 333569 URL: https://svnweb.freebsd.org/changeset/base/333569 Log: cpucontrol: improve Intel microcode revision check According to the Intel SDM (Volme 3, 9.11.7) the BIOS signature MSR should be zeroed before executing cpuid (although in practice it does not seem to matter). PR: 192487 Submitted by: Dan Lukes Reported by: Henrique de Moraes Holschuh MFC after: 3 days Modified: head/usr.sbin/cpucontrol/intel.c Modified: head/usr.sbin/cpucontrol/intel.c ============================================================================== --- head/usr.sbin/cpucontrol/intel.c Sat May 12 15:20:39 2018 (r333568) +++ head/usr.sbin/cpucontrol/intel.c Sat May 12 15:34:35 2018 (r333569) @@ -95,7 +95,8 @@ intel_update(const char *dev, const char *path) void *fw_data; size_t data_size, total_size; cpuctl_msr_args_t msrargs = { - .msr = MSR_IA32_PLATFORM_ID, + .msr = MSR_BIOS_SIGN, + .data = 0, }; cpuctl_cpuid_args_t idargs = { .level = 1, /* Signature. */ @@ -115,12 +116,18 @@ intel_update(const char *dev, const char *path) WARN(0, "could not open %s for writing", dev); return; } + error = ioctl(devfd, CPUCTL_WRMSR, &msrargs); + if (error < 0) { + WARN(0, "ioctl(%s)", dev); + goto fail; + } error = ioctl(devfd, CPUCTL_CPUID, &idargs); if (error < 0) { WARN(0, "ioctl(%s)", dev); goto fail; } signature = idargs.data[0]; + msrargs.msr = MSR_IA32_PLATFORM_ID; error = ioctl(devfd, CPUCTL_RDMSR, &msrargs); if (error < 0) { WARN(0, "ioctl(%s)", dev);
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