Date: Fri, 13 Aug 2004 16:46:32 -0400 From: Aniruddha Bohra <bohra@cs.rutgers.edu> To: John Baldwin <jhb@FreeBSD.org> Cc: Andrew Gallatin <gallatin@cs.duke.edu> Subject: Re: Is the TSC timecounter safe on SMP system? Message-ID: <411D28A8.6040601@cs.rutgers.edu> In-Reply-To: <200408131338.37038.jhb@FreeBSD.org> References: <16668.61707.474283.639200@grasshopper.cs.duke.edu> <200408131326.16412.jhb@FreeBSD.org> <16668.64083.212658.727644@grasshopper.cs.duke.edu> <200408131338.37038.jhb@FreeBSD.org>
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John Baldwin wrote: >On Friday 13 August 2004 01:28 pm, Andrew Gallatin wrote: > > >>John Baldwin writes: >> > On Friday 13 August 2004 12:49 pm, Andrew Gallatin wrote: >> > > I have a system where the TSC timecounter is quite a bit more accurate >> > > (or perhaps its just much cheaper) than the ACPI timecounter. This is >> > > a single CPU, HTT system running an SMP kernel. >> > > >> > > A simple program which calls gettimeofday() in a tight loop, looking >> > > for the microseconds to change sees ~998,000 microsecond updates/sec >> > > with kern.timecounter.hardware=TSC, and 28,500 updates/sec with >> > > ACPI-safe. >> > > >> > > 1) Is it safe to switch to TSC? >> > > >> > > 2) If yes, would it be safe to switch to TSC if this was a real >> > > SMP system with multiple physical cpus? >> > >> > Probably not. The problem is that the TSC is not necessarily in sync >> > between the CPUs so time would "jump around" as you migrated between >> > CPUs. If you can get the TSC's synchronized between the CPUs and keep >> > them that way then you can use the TSC (Linux does this FWIW). >> >>But on a single CPU HTT machine, does each HTT core reads the same TSC? >> >> > >I think they each have their own TSC. > > > Hi, This is from the Intel system programmer's manual Vol 3 Page 15-56: There are three ways to count processor clock cycles to monitor performance. These are: • Non-Halted Clockticks – Measures clock cycles in which the specified logical processor is not halted and is not in any power-saving state. When Hyper-Threading Technology is enabled, this these ticks can be measured on a per-logical-processor basis. • Non-Sleep Clockticks – Measures clock cycles in which the specified physical processor is not in a sleep mode or in a power-saving state. These ticks cannot be measured on a logical-processor basis. • Time Stamp Counter – Measures clock cycles in which the physical processor is not in deep sleep. These ticks cannot be measured on a logical-processor basis. ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ So I think TSC is not per logical processor but per package. Thanks Aniruddha
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