Date: Sun, 21 Jul 2013 03:52:52 +0000 (UTC) From: Adrian Chadd <adrian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r253508 - head/sys/mips/atheros Message-ID: <201307210352.r6L3qqRS057016@svn.freebsd.org>
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Author: adrian Date: Sun Jul 21 03:52:52 2013 New Revision: 253508 URL: http://svnweb.freebsd.org/changeset/base/253508 Log: Initialise the watchdog and UART frequencies. For all pre-AR933x chips, the frequency is just the APB frequency. For the AR933x, the UART frequency is different but we just hacked around it. For the AR934x, there's a different PLL setting for these, so they have to be broken out. Modified: head/sys/mips/atheros/ar71xx_chip.c head/sys/mips/atheros/ar724x_chip.c head/sys/mips/atheros/ar91xx_chip.c head/sys/mips/atheros/ar933x_chip.c Modified: head/sys/mips/atheros/ar71xx_chip.c ============================================================================== --- head/sys/mips/atheros/ar71xx_chip.c Sun Jul 21 03:51:24 2013 (r253507) +++ head/sys/mips/atheros/ar71xx_chip.c Sun Jul 21 03:52:52 2013 (r253508) @@ -78,6 +78,8 @@ __FBSDID("$FreeBSD$"); uint32_t u_ar71xx_cpu_freq; uint32_t u_ar71xx_ahb_freq; uint32_t u_ar71xx_ddr_freq; +uint32_t u_ar71xx_uart_freq; +uint32_t u_ar71xx_wdt_freq; uint32_t u_ar71xx_refclk; static void @@ -107,6 +109,8 @@ ar71xx_chip_detect_sys_frequency(void) div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2; u_ar71xx_ahb_freq = u_ar71xx_cpu_freq / div; + u_ar71xx_wdt_freq = u_ar71xx_cpu_freq / div; + u_ar71xx_uart_freq = u_ar71xx_cpu_freq / div; } /* Modified: head/sys/mips/atheros/ar724x_chip.c ============================================================================== --- head/sys/mips/atheros/ar724x_chip.c Sun Jul 21 03:51:24 2013 (r253507) +++ head/sys/mips/atheros/ar724x_chip.c Sun Jul 21 03:52:52 2013 (r253508) @@ -90,6 +90,8 @@ ar724x_chip_detect_sys_frequency(void) div = (((pll >> AR724X_AHB_DIV_SHIFT) & AR724X_AHB_DIV_MASK) + 1) * 2; u_ar71xx_ahb_freq = u_ar71xx_cpu_freq / div; + u_ar71xx_wdt_freq = u_ar71xx_cpu_freq / div; + u_ar71xx_uart_freq = u_ar71xx_cpu_freq / div; } static void Modified: head/sys/mips/atheros/ar91xx_chip.c ============================================================================== --- head/sys/mips/atheros/ar91xx_chip.c Sun Jul 21 03:51:24 2013 (r253507) +++ head/sys/mips/atheros/ar91xx_chip.c Sun Jul 21 03:52:52 2013 (r253508) @@ -84,6 +84,8 @@ ar91xx_chip_detect_sys_frequency(void) div = (((pll >> AR91XX_AHB_DIV_SHIFT) & AR91XX_AHB_DIV_MASK) + 1) * 2; u_ar71xx_ahb_freq = u_ar71xx_cpu_freq / div; + u_ar71xx_uart_freq = u_ar71xx_cpu_freq / div; + u_ar71xx_wdt_freq = u_ar71xx_cpu_freq / div; } static void Modified: head/sys/mips/atheros/ar933x_chip.c ============================================================================== --- head/sys/mips/atheros/ar933x_chip.c Sun Jul 21 03:51:24 2013 (r253507) +++ head/sys/mips/atheros/ar933x_chip.c Sun Jul 21 03:52:52 2013 (r253508) @@ -114,6 +114,10 @@ ar933x_chip_detect_sys_frequency(void) AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK) + 1; u_ar71xx_ahb_freq = freq / t; } + + /* XXX uart should be the refclk, no? */ + u_ar71xx_uart_freq = u_ar71xx_ahb_freq; + u_ar71xx_wdt_freq = u_ar71xx_ahb_freq; } static void
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