Date: Fri, 23 Oct 2015 15:24:00 +0000 (UTC) From: Ed Maste <emaste@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r289833 - head/sys/arm64/arm64 Message-ID: <201510231524.t9NFO0K7015051@repo.freebsd.org>
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Author: emaste Date: Fri Oct 23 15:24:00 2015 New Revision: 289833 URL: https://svnweb.freebsd.org/changeset/base/289833 Log: arm64: remove exception instruction length assertion From the (now removed) comment: * It is unclear in some cases if the bit is implementation defined. * The Foundation Model and QEMU disagree on if the IL bit should * be set when we are in a data fault from the same EL and the ISV * bit (bit 24) is also set. Instead of adding even more special cases just remove the assertion. Approved by: andrew Sponsored by: The FreeBSD Foundation Modified: head/sys/arm64/arm64/trap.c Modified: head/sys/arm64/arm64/trap.c ============================================================================== --- head/sys/arm64/arm64/trap.c Fri Oct 23 15:14:37 2015 (r289832) +++ head/sys/arm64/arm64/trap.c Fri Oct 23 15:24:00 2015 (r289833) @@ -263,20 +263,6 @@ do_el1h_sync(struct trapframe *frame) return; #endif - /* - * Sanity check we are in an exception er can handle. The IL bit - * is used to indicate the instruction length, except in a few - * exceptions described in the ARMv8 ARM. - * - * It is unclear in some cases if the bit is implementation defined. - * The Foundation Model and QEMU disagree on if the IL bit should - * be set when we are in a data fault from the same EL and the ISV - * bit (bit 24) is also set. - */ - KASSERT((esr & ESR_ELx_IL) == ESR_ELx_IL || - (exception == EXCP_DATA_ABORT && ((esr & ISS_DATA_ISV) == 0)), - ("Invalid instruction length in exception, esr %lx", esr)); - CTR4(KTR_TRAP, "do_el1_sync: curthread: %p, esr %lx, elr: %lx, frame: %p", curthread, esr, frame->tf_elr, frame);
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