Date: Thu, 7 Apr 2011 16:00:11 -0400 From: Jung-uk Kim <jkim@FreeBSD.org> To: freebsd-current@FreeBSD.org Cc: Andriy Gapon <avg@freebsd.org> Subject: Re: prefer tsc timecounter when it's good Message-ID: <201104071600.13586.jkim@FreeBSD.org> In-Reply-To: <4D9DF086.9020906@FreeBSD.org> References: <4D9DF086.9020906@FreeBSD.org>
next in thread | previous in thread | raw e-mail | index | archive | help
On Thursday 07 April 2011 01:12 pm, Andriy Gapon wrote:
> Guys,
>
> what do you think about the following change?
> The idea is mark TSC as the best timecounter when it's invariant
> and synchronized between cores. Unfortunately I don't have code to
> auto-detect the synchronization and keep relying on the
> corresponding tunable.
I know Intel is claiming that TSCs for all cores/packages reset to
zero when they receive a "synchronous" INIT/RESET IPI. I haven't
really verified their claim but I think it may be good enough for our
AP startup code. However, AMD processors never had such guarantee,
AFAIK.
> I thought about auto-setting it for single-package configurations,
> but even that information is currently not trivial to get out of our
> mp (i386/amd64) machdep code.
It isn't easy ATM. :-/
> --- a/sys/x86/x86/tsc.c
> +++ b/sys/x86/x86/tsc.c
> @@ -169,6 +169,9 @@ init_TSC_tc(void)
> printf("TSC timecounter disabled: APM enabled.\n");
> }
>
> + if (tsc_is_invariant)
> + tsc_timecounter.tc_quality = 1200;
> +
> #ifdef SMP
> /*
> * We can not use the TSC in SMP mode unless the TSCs on all CPUs
Although it looks okay, please don't commit it just yet. I am working
in this area actively. Also, if the Intel's claim is true, i.e.,
TSCs reset to zero when APs start, we cannot use TSC as a timecounter
hardware until all APs are started properly.
Thanks,
Jung-uk Kim
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201104071600.13586.jkim>