Date: Tue, 26 Jan 2021 13:04:46 GMT From: Marcin Wojtas <mw@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: a86b0839d7bf - main - marvell: ap806_clock: add missing frequency modes Message-ID: <202101261304.10QD4kBn047819@gitrepo.freebsd.org>
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The branch main has been updated by mw: URL: https://cgit.FreeBSD.org/src/commit/?id=a86b0839d7bf3fc06b1ae9c50e055b53c50a9d0b commit a86b0839d7bf3fc06b1ae9c50e055b53c50a9d0b Author: Marcin Wojtas <mw@FreeBSD.org> AuthorDate: 2021-01-26 10:49:35 +0000 Commit: Marcin Wojtas <mw@FreeBSD.org> CommitDate: 2021-01-26 13:04:22 +0000 marvell: ap806_clock: add missing frequency modes In the driver init routine the CPU clock frequency value is obtained from a dedicated register. Until now only part of the values were handled by the mv_ap806_clock driver. Fix that by adding missing cases. Submitted by: Zyta Szpak <zr@semihalf.com> MFC after: 1 week Obtained from: Semihalf Sponsored by: Marvell --- sys/arm/mv/mv_ap806_clock.c | 34 ++++++++++++++++++++++++++++++---- 1 file changed, 30 insertions(+), 4 deletions(-) diff --git a/sys/arm/mv/mv_ap806_clock.c b/sys/arm/mv/mv_ap806_clock.c index 378640633c03..56041a48d312 100644 --- a/sys/arm/mv/mv_ap806_clock.c +++ b/sys/arm/mv/mv_ap806_clock.c @@ -136,25 +136,51 @@ mv_ap806_clock_attach(device_t dev) return (ENXIO); } - /* - * We might miss some combinations - * Those are the only possible ones on the mcbin - */ reg = RD4(sc, 0x400); switch (reg & 0x1f) { case 0x0: case 0x1: clock_freq = 2000000000; break; + case 0x4: + clock_freq = 1600000000; + break; case 0x6: clock_freq = 1800000000; break; + case 0x7: + clock_freq = 1800000000; + break; + case 0xb: + clock_freq = 1600000000; + break; case 0xd: clock_freq = 1600000000; break; + case 0x13: + clock_freq = 1000000000; + break; case 0x14: clock_freq = 1333000000; break; + case 0x17: + clock_freq = 1333000000; + break; + case 0x19: + clock_freq = 1200000000; + break; + case 0x1a: + clock_freq = 1400000000; + break; + case 0x1b: + clock_freq = 600000000; + break; + case 0x1c: + clock_freq = 800000000; + break; + case 0x1d: + clock_freq = 1000000000; + break; default: device_printf(dev, "Cannot guess clock freq with reg %x\n", reg & 0x1f);
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