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Date:      Sun, 30 Apr 2023 06:58:16 GMT
From:      Hans Petter Selasky <hselasky@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org
Subject:   git: 4c002f0842e5 - stable/13 - mlx5: Implement mlx5_core_modify_cq_by_mask().
Message-ID:  <202304300658.33U6wGom071979@gitrepo.freebsd.org>

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The branch stable/13 has been updated by hselasky:

URL: https://cgit.FreeBSD.org/src/commit/?id=4c002f0842e58bb00ed00e680f637e4aa7fb1bcc

commit 4c002f0842e58bb00ed00e680f637e4aa7fb1bcc
Author:     Hans Petter Selasky <hselasky@FreeBSD.org>
AuthorDate: 2023-04-18 11:21:28 +0000
Commit:     Hans Petter Selasky <hselasky@FreeBSD.org>
CommitDate: 2023-04-30 06:56:19 +0000

    mlx5: Implement mlx5_core_modify_cq_by_mask().
    
    Implement one CQ modify function supporting all firmware versions,
    instead of having more variants of CQ modify.
    
    Sponsored by:   NVIDIA Networking
    
    (cherry picked from commit 273bfac08ff838786c8b48bc7d3d7180b5f6a3be)
---
 sys/dev/mlx5/cq.h                |  5 +++++
 sys/dev/mlx5/mlx5_core/mlx5_cq.c | 44 +++++++++++++++++++++++-----------------
 2 files changed, 30 insertions(+), 19 deletions(-)

diff --git a/sys/dev/mlx5/cq.h b/sys/dev/mlx5/cq.h
index d5e167498fd2..ffa98c38bee9 100644
--- a/sys/dev/mlx5/cq.h
+++ b/sys/dev/mlx5/cq.h
@@ -86,6 +86,7 @@ enum {
 	MLX5_CQ_MODIFY_PERIOD	= 1 << 0,
 	MLX5_CQ_MODIFY_COUNT	= 1 << 1,
 	MLX5_CQ_MODIFY_OVERRUN	= 1 << 2,
+	MLX5_CQ_MODIFY_EQN	= 1 << 3,
 	MLX5_CQ_MODIFY_PERIOD_MODE = 1 << 4,
 };
 
@@ -169,6 +170,10 @@ int mlx5_core_modify_cq_moderation_mode(struct mlx5_core_dev *dev,
 					u16 cq_period,
 					u16 cq_max_count,
 					u8 cq_mode);
+int mlx5_core_modify_cq_by_mask(struct mlx5_core_dev *,
+				struct mlx5_core_cq *, u32 mask,
+				u16 cq_period, u16 cq_max_count,
+				u8 cq_mode, u8 cq_eqn);
 int mlx5_debug_cq_add(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
 void mlx5_debug_cq_remove(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
 
diff --git a/sys/dev/mlx5/mlx5_core/mlx5_cq.c b/sys/dev/mlx5/mlx5_core/mlx5_cq.c
index 8f873bde6073..e849663528b2 100644
--- a/sys/dev/mlx5/mlx5_core/mlx5_cq.c
+++ b/sys/dev/mlx5/mlx5_core/mlx5_cq.c
@@ -219,18 +219,9 @@ int mlx5_core_modify_cq_moderation(struct mlx5_core_dev *dev,
 				   u16 cq_period,
 				   u16 cq_max_count)
 {
-	u32 in[MLX5_ST_SZ_DW(modify_cq_in)] = {0};
-	void *cqc;
-
-	MLX5_SET(modify_cq_in, in, cqn, cq->cqn);
-	cqc = MLX5_ADDR_OF(modify_cq_in, in, cq_context);
-	MLX5_SET(cqc, cqc, cq_period, cq_period);
-	MLX5_SET(cqc, cqc, cq_max_count, cq_max_count);
-	MLX5_SET(modify_cq_in, in,
-		 modify_field_select_resize_field_select.modify_field_select.modify_field_select,
-		 MLX5_CQ_MODIFY_PERIOD | MLX5_CQ_MODIFY_COUNT);
-
-	return mlx5_core_modify_cq(dev, cq, in, sizeof(in));
+	return (mlx5_core_modify_cq_by_mask(dev, cq,
+	    MLX5_CQ_MODIFY_PERIOD | MLX5_CQ_MODIFY_COUNT,
+	    cq_period, cq_max_count, 0, 0));
 }
 
 int mlx5_core_modify_cq_moderation_mode(struct mlx5_core_dev *dev,
@@ -239,19 +230,34 @@ int mlx5_core_modify_cq_moderation_mode(struct mlx5_core_dev *dev,
 					u16 cq_max_count,
 					u8 cq_mode)
 {
-	u32 in[MLX5_ST_SZ_DW(modify_cq_in)] = {0};
+	return (mlx5_core_modify_cq_by_mask(dev, cq,
+	    MLX5_CQ_MODIFY_PERIOD | MLX5_CQ_MODIFY_COUNT | MLX5_CQ_MODIFY_PERIOD_MODE,
+	    cq_period, cq_max_count, cq_mode, 0));
+}
+
+int
+mlx5_core_modify_cq_by_mask(struct mlx5_core_dev *dev,
+    struct mlx5_core_cq *cq, u32 mask,
+    u16 cq_period, u16 cq_max_count, u8 cq_mode, u8 cq_eqn)
+{
+	u32 in[MLX5_ST_SZ_DW(modify_cq_in)] = {};
 	void *cqc;
 
 	MLX5_SET(modify_cq_in, in, cqn, cq->cqn);
 	cqc = MLX5_ADDR_OF(modify_cq_in, in, cq_context);
-	MLX5_SET(cqc, cqc, cq_period, cq_period);
-	MLX5_SET(cqc, cqc, cq_max_count, cq_max_count);
-	MLX5_SET(cqc, cqc, cq_period_mode, cq_mode);
+	if (mask & MLX5_CQ_MODIFY_PERIOD)
+		MLX5_SET(cqc, cqc, cq_period, cq_period);
+	if (mask & MLX5_CQ_MODIFY_COUNT)
+		MLX5_SET(cqc, cqc, cq_max_count, cq_max_count);
+	if (mask & MLX5_CQ_MODIFY_PERIOD_MODE)
+		MLX5_SET(cqc, cqc, cq_period_mode, cq_mode);
+	if (mask & MLX5_CQ_MODIFY_EQN)
+		MLX5_SET(cqc, cqc, c_eqn, cq_eqn);
+
 	MLX5_SET(modify_cq_in, in,
-		 modify_field_select_resize_field_select.modify_field_select.modify_field_select,
-		 MLX5_CQ_MODIFY_PERIOD | MLX5_CQ_MODIFY_COUNT | MLX5_CQ_MODIFY_PERIOD_MODE);
+	    modify_field_select_resize_field_select.modify_field_select.modify_field_select, mask);
 
-	return mlx5_core_modify_cq(dev, cq, in, sizeof(in));
+	return (mlx5_core_modify_cq(dev, cq, in, sizeof(in)));
 }
 
 int mlx5_init_cq_table(struct mlx5_core_dev *dev)



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