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Date:      Wed, 11 Sep 2002 16:39:48 -0700
From:      "Jin Guojun [DSD]" <j_guojun@lbl.gov>
To:        Charles Sprickman <spork@inch.com>
Cc:        freebsd-hardware@FreeBSD.ORG
Subject:   Re: Feedback on Intel server SRMK2
Message-ID:  <3D7FD444.7B89FE2F@lbl.gov>
References:  <Pine.BSF.4.44.0209111552040.28660-100000@shell.inch.com>

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Charles Sprickman wrote:

> Hi,
>
> I'm curious if anyone here has used one of these with FreeBSD:
>
> http://support.intel.com/support/motherboards/server/srmk2/
>
> Seems like a nice server, specs look good, lots of used ones available
> that will take dual PIII-1.2's.  A little out of date, but for $300
> (empty), not too bad.
>

Have not used this. For $300, you can get dual AMD or single P4 M/B + 1 CPU.

>
> General opinions on Intel servers/mobos also welcomed.

Generally, Intel PCI chipsets always have some problem in either memory
controller,
L2/L3 cache, or bridge/bridge design. Below compares different server chipsets.

Intel 860 had really bad handshaking on Memory Controller Hub (MCH 82860
chipset).
It limits the maximum I/O to 90 MB/s. No fixing was posted in Aug.
By tuning 82806AA PCI 64 Hub (P64H) chipset, you can increase it to 117.5 MB/s,
which I did for SuperMicro (P4DC6+). I suggested them to revise the BIOS.

> adjusting the following P64H register bits:
> CNF ­ P64H Configuration Register (D31:F0), Address Offset 50-51h, Bit[2],
> Delay Transaction (DT) Depth. Change bit 2 from "0" to "1".
> Soft_DT_Timer ­ Soft Delayed Transaction Timer Register (D31:F0),
> Address Offset 80h, bits[1:0], 1 bit Soft Delayed Transaction Timer. Change
bits [1:0]
> from default to a lesser value.

Intel E7500 chipset does not have such bug, but the memory bandwidth (545) is
much less
then the ServerWork chipset (672 MB/s) when compared with same XEON CPU.
Two IDE buses are actually one, and the total IDE bandwidth is less 100 MB/s.
The TCP Rx rate is about 1.6 Gbit/s and Tx rate is about 1.25 Gbit/s (two SK
NICs),
which is desired.

AMD MPX chipset is good on IDE bus design. I have gotten 190 MB/s on two IDE
buses.
But, its memory bandwidth is lower around 300 MB/s. So, when doing high-speed
network
I/O, the maximum TCP rate is about 1.0 Gbit/s for both Rx/Tx (one or two SK
NICs).

All tests are using the same two ECC/REG DDR PC2100 memory.

AMD MP +2000 (1.6667 GHz) CPU seems having the similar performance as the
XEON 2.0 GHz CPU in general test. XEON CPU has slightly better floating
point performance.

    -Jin


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