Date: Fri, 19 Aug 2016 19:02:18 +0000 (UTC) From: Sean Bruno <sbruno@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-releng@freebsd.org Subject: svn commit: r304493 - releng/11.0/sys/dev/e1000 Message-ID: <201608191902.u7JJ2IfX056871@repo.freebsd.org>
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Author: sbruno Date: Fri Aug 19 19:02:18 2016 New Revision: 304493 URL: https://svnweb.freebsd.org/changeset/base/304493 Log: MF stable11 r304337 e1000: Add support for Kaby Lake IDs Fixup some errors when transitioning to/from low power states. Approved by: re (kib) Modified: releng/11.0/sys/dev/e1000/e1000_api.c releng/11.0/sys/dev/e1000/e1000_hw.h releng/11.0/sys/dev/e1000/e1000_ich8lan.c releng/11.0/sys/dev/e1000/e1000_ich8lan.h releng/11.0/sys/dev/e1000/e1000_phy.c releng/11.0/sys/dev/e1000/if_em.c Directory Properties: releng/11.0/ (props changed) Modified: releng/11.0/sys/dev/e1000/e1000_api.c ============================================================================== --- releng/11.0/sys/dev/e1000/e1000_api.c Fri Aug 19 18:45:42 2016 (r304492) +++ releng/11.0/sys/dev/e1000/e1000_api.c Fri Aug 19 19:02:18 2016 (r304493) @@ -304,6 +304,10 @@ s32 e1000_set_mac_type(struct e1000_hw * case E1000_DEV_ID_PCH_SPT_I219_LM2: case E1000_DEV_ID_PCH_SPT_I219_V2: case E1000_DEV_ID_PCH_LBG_I219_LM3: + case E1000_DEV_ID_PCH_SPT_I219_LM4: + case E1000_DEV_ID_PCH_SPT_I219_V4: + case E1000_DEV_ID_PCH_SPT_I219_LM5: + case E1000_DEV_ID_PCH_SPT_I219_V5: mac->type = e1000_pch_spt; break; case E1000_DEV_ID_82575EB_COPPER: Modified: releng/11.0/sys/dev/e1000/e1000_hw.h ============================================================================== --- releng/11.0/sys/dev/e1000/e1000_hw.h Fri Aug 19 18:45:42 2016 (r304492) +++ releng/11.0/sys/dev/e1000/e1000_hw.h Fri Aug 19 19:02:18 2016 (r304493) @@ -142,6 +142,10 @@ struct e1000_hw; #define E1000_DEV_ID_PCH_SPT_I219_LM2 0x15B7 /* Sunrise Point-H PCH */ #define E1000_DEV_ID_PCH_SPT_I219_V2 0x15B8 /* Sunrise Point-H PCH */ #define E1000_DEV_ID_PCH_LBG_I219_LM3 0x15B9 /* LEWISBURG PCH */ +#define E1000_DEV_ID_PCH_SPT_I219_LM4 0x15D7 +#define E1000_DEV_ID_PCH_SPT_I219_V4 0x15D8 +#define E1000_DEV_ID_PCH_SPT_I219_LM5 0x15E3 +#define E1000_DEV_ID_PCH_SPT_I219_V5 0x15D6 #define E1000_DEV_ID_82576 0x10C9 #define E1000_DEV_ID_82576_FIBER 0x10E6 #define E1000_DEV_ID_82576_SERDES 0x10E7 @@ -957,9 +961,13 @@ struct e1000_dev_spec_ich8lan { E1000_MUTEX nvm_mutex; E1000_MUTEX swflag_mutex; bool nvm_k1_enabled; + bool disable_k1_off; bool eee_disable; u16 eee_lp_ability; enum e1000_ulp_state ulp_state; + bool ulp_capability_disabled; + bool during_suspend_flow; + bool during_dpg_exit; }; struct e1000_dev_spec_82575 { Modified: releng/11.0/sys/dev/e1000/e1000_ich8lan.c ============================================================================== --- releng/11.0/sys/dev/e1000/e1000_ich8lan.c Fri Aug 19 18:45:42 2016 (r304492) +++ releng/11.0/sys/dev/e1000/e1000_ich8lan.c Fri Aug 19 19:02:18 2016 (r304493) @@ -288,7 +288,7 @@ static void e1000_toggle_lanphypc_pch_lp mac_reg &= ~E1000_CTRL_LANPHYPC_VALUE; E1000_WRITE_REG(hw, E1000_CTRL, mac_reg); E1000_WRITE_FLUSH(hw); - usec_delay(10); + msec_delay(1); mac_reg &= ~E1000_CTRL_LANPHYPC_OVERRIDE; E1000_WRITE_REG(hw, E1000_CTRL, mac_reg); E1000_WRITE_FLUSH(hw); @@ -1625,7 +1625,17 @@ static s32 e1000_check_for_copper_link_i hw->phy.ops.write_reg_locked(hw, I217_PLL_CLOCK_GATE_REG, phy_reg); - } + + if (speed == SPEED_1000) { + hw->phy.ops.read_reg_locked(hw, HV_PM_CTRL, + &phy_reg); + + phy_reg |= HV_PM_CTRL_K1_CLK_REQ; + + hw->phy.ops.write_reg_locked(hw, HV_PM_CTRL, + phy_reg); + } + } hw->phy.ops.release(hw); if (ret_val) @@ -1718,7 +1728,8 @@ static s32 e1000_check_for_copper_link_i u32 pcieanacfg = E1000_READ_REG(hw, E1000_PCIEANACFG); u32 fextnvm6 = E1000_READ_REG(hw, E1000_FEXTNVM6); - if (pcieanacfg & E1000_FEXTNVM6_K1_OFF_ENABLE) + if ((pcieanacfg & E1000_FEXTNVM6_K1_OFF_ENABLE) && + (hw->dev_spec.ich8lan.disable_k1_off == FALSE)) fextnvm6 |= E1000_FEXTNVM6_K1_OFF_ENABLE; else fextnvm6 &= ~E1000_FEXTNVM6_K1_OFF_ENABLE; Modified: releng/11.0/sys/dev/e1000/e1000_ich8lan.h ============================================================================== --- releng/11.0/sys/dev/e1000/e1000_ich8lan.h Fri Aug 19 18:45:42 2016 (r304492) +++ releng/11.0/sys/dev/e1000/e1000_ich8lan.h Fri Aug 19 19:02:18 2016 (r304493) @@ -239,7 +239,7 @@ /* PHY Power Management Control */ #define HV_PM_CTRL PHY_REG(770, 17) -#define HV_PM_CTRL_PLL_STOP_IN_K1_GIGA 0x100 +#define HV_PM_CTRL_K1_CLK_REQ 0x200 #define HV_PM_CTRL_K1_ENABLE 0x4000 #define I217_PLL_CLOCK_GATE_REG PHY_REG(772, 28) Modified: releng/11.0/sys/dev/e1000/e1000_phy.c ============================================================================== --- releng/11.0/sys/dev/e1000/e1000_phy.c Fri Aug 19 18:45:42 2016 (r304492) +++ releng/11.0/sys/dev/e1000/e1000_phy.c Fri Aug 19 19:02:18 2016 (r304493) @@ -4146,12 +4146,13 @@ s32 e1000_read_phy_reg_mphy(struct e1000 *data = E1000_READ_REG(hw, E1000_MPHY_DATA); /* Disable access to mPHY if it was originally disabled */ - if (locked) { + if (locked) ready = e1000_is_mphy_ready(hw); - if (!ready) - return -E1000_ERR_PHY; - } - E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL, E1000_MPHY_DIS_ACCESS); + if (!ready) + return -E1000_ERR_PHY; + E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL, + E1000_MPHY_DIS_ACCESS); + return E1000_SUCCESS; } @@ -4210,12 +4211,13 @@ s32 e1000_write_phy_reg_mphy(struct e100 E1000_WRITE_REG(hw, E1000_MPHY_DATA, data); /* Disable access to mPHY if it was originally disabled */ - if (locked) { + if (locked) ready = e1000_is_mphy_ready(hw); - if (!ready) - return -E1000_ERR_PHY; - } - E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL, E1000_MPHY_DIS_ACCESS); + if (!ready) + return -E1000_ERR_PHY; + E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL, + E1000_MPHY_DIS_ACCESS); + return E1000_SUCCESS; } Modified: releng/11.0/sys/dev/e1000/if_em.c ============================================================================== --- releng/11.0/sys/dev/e1000/if_em.c Fri Aug 19 18:45:42 2016 (r304492) +++ releng/11.0/sys/dev/e1000/if_em.c Fri Aug 19 19:02:18 2016 (r304493) @@ -193,6 +193,12 @@ static em_vendor_info_t em_vendor_info_a { 0x8086, E1000_DEV_ID_PCH_SPT_I219_V2, PCI_ANY_ID, PCI_ANY_ID, 0}, { 0x8086, E1000_DEV_ID_PCH_LBG_I219_LM3, PCI_ANY_ID, PCI_ANY_ID, 0}, + { 0x8086, E1000_DEV_ID_PCH_SPT_I219_LM4, + PCI_ANY_ID, PCI_ANY_ID, 0}, + { 0x8086, E1000_DEV_ID_PCH_SPT_I219_V4, PCI_ANY_ID, PCI_ANY_ID, 0}, + { 0x8086, E1000_DEV_ID_PCH_SPT_I219_LM5, + PCI_ANY_ID, PCI_ANY_ID, 0}, + { 0x8086, E1000_DEV_ID_PCH_SPT_I219_V5, PCI_ANY_ID, PCI_ANY_ID, 0}, /* required last entry */ { 0, 0, 0, 0, 0} };
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