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Date:      Fri, 31 Jul 2015 04:48:00 +0200
From:      Hans Petter Selasky <hps@selasky.org>
To:        Svatopluk Kraus <onwahe@gmail.com>
Cc:        "freebsd-arm@freebsd.org" <freebsd-arm@freebsd.org>
Subject:   Re: [RPI-B] [HEADS UP] DWC OTG TX path optimisation for 11-current
Message-ID:  <55BAE1E0.9010008@selasky.org>
In-Reply-To: <55BAE022.3010301@selasky.org>
References:  <55A7D8CE.4020809@selasky.org>	<CAHNYxxMp9jGDbV-5=-cE6daR-O3eN5pdvO1s-=QfX=A9XYqYmA@mail.gmail.com>	<55B23276.8090703@selasky.org>	<CAHNYxxNc9uB62hHEv1PM9PcsGgUs=zsvNgatqLD0p%2BiiDA3Aiw@mail.gmail.com>	<55B73113.2020308@selasky.org>	<CAFHCsPVaPZpqXLS7OApa=Xz5VLnLjVpV5dYV8Pn2uHh1Lcz7Tg@mail.gmail.com>	<55B8AB76.7030603@selasky.org>	<CAFHCsPUMaYEwJsaGUFuw9yZi_5bmraSBsOYpRWvSeuebpXBJUA@mail.gmail.com>	<55B8B297.1010008@selasky.org>	<CAFHCsPVGLs8j6LAV%2Bg4rP_ueTOd8pUOupYFGvmgC3XGcJC720Q@mail.gmail.com>	<20150729154516.GH78154@funkthat.com>	<55B8F5EC.2050908@selasky.org>	<CAFHCsPXmQCKt-5xWa6XwECqFO5oz4mT9m1mPu0dKmmQ%2BG9yUAA@mail.gmail.com>	<55B9F914.7030403@selasky.org>	<CAFHCsPVzFE-a2x2rsZRshGZExwZX9dCz2hXtpb2t5LFKN-14aQ@mail.gmail.com>	<55BA1889.4040509@selasky.org>	<55BA1AC7.4050602@selasky.org> <CAFHCsPXmm8rhZpiQ4uhPCkwBKC1o5gMLFYHEj9s5e3ObU21BPg@mail.gmail.com> <55BAD963.9000808@selasky.org> <55BAE022.3010301@selasky.org>

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On 07/31/15 04:40, Hans Petter Selasky wrote:
> On 07/31/15 04:11, Hans Petter Selasky wrote:
>> +    /* clear RX FIFO level interrupt */
>> +    DWC_OTG_WRITE_4(sc, DOTG_GINTSTS, GINTMSK_RXFLVL);
>> +
>
> Minor typo there, should be:
>
> DWC_OTG_WRITE_4(sc, DOTG_GINTSTS, GINTSTS_RXFLVL);
>

Please find attached patch.

--HPS


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Index: sys/dev/usb/controller/dwc_otg.c
===================================================================
--- sys/dev/usb/controller/dwc_otg.c	(revision 286002)
+++ sys/dev/usb/controller/dwc_otg.c	(working copy)
@@ -579,6 +579,9 @@
 	sc->sc_irq_mask |= GINTMSK_RXFLVLMSK;
 	DWC_OTG_WRITE_4(sc, DOTG_GINTMSK, sc->sc_irq_mask);
 
+	/* clear RX FIFO level interrupt */
+	DWC_OTG_WRITE_4(sc, DOTG_GINTSTS, GINTSTS_RXFLVL);
+
 	/* clear cached status */
 	sc->sc_last_rx_status = 0;
 }

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