Date: Tue, 21 Jul 2020 22:47:02 +0000 (UTC) From: Mitchell Horne <mhorne@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r363404 - in head/sys: kern riscv/riscv Message-ID: <202007212247.06LMl2Em031296@repo.freebsd.org>
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Author: mhorne Date: Tue Jul 21 22:47:02 2020 New Revision: 363404 URL: https://svnweb.freebsd.org/changeset/base/363404 Log: INTRNG: only shuffle for !EARLY_AP_STARTUP During device attachment, all interrupt sources will bind to the BSP, as it is the only processor online. This means interrupts must be redistributed ("shuffled") later, during SI_SUB_SMP. For the EARLY_AP_STARTUP case, this is no longer true. SI_SUB_SMP will execute much earlier, meaning APs will be online and available before devices begin attachment, and there will therefore be nothing to shuffle. All PIC-conforming interrupt controllers will handle this early distribution properly, except for RISC-V's PLIC. Make the necessary tweak to the PLIC driver. While here, convert irq_assign_cpu from a boolean_t to a bool. Reviewed by: markj Differential Revision: https://reviews.freebsd.org/D25693 Modified: head/sys/kern/subr_intr.c head/sys/riscv/riscv/plic.c Modified: head/sys/kern/subr_intr.c ============================================================================== --- head/sys/kern/subr_intr.c Tue Jul 21 19:56:13 2020 (r363403) +++ head/sys/kern/subr_intr.c Tue Jul 21 22:47:02 2020 (r363404) @@ -128,8 +128,12 @@ static struct intr_irqsrc *irq_sources[NIRQ]; u_int irq_next_free; #ifdef SMP -static boolean_t irq_assign_cpu = FALSE; +#ifdef EARLY_AP_STARTUP +static bool irq_assign_cpu = true; +#else +static bool irq_assign_cpu = false; #endif +#endif /* * - 2 counters for each I/O interrupt. @@ -1191,6 +1195,7 @@ intr_irq_next_cpu(u_int last_cpu, cpuset_t *cpumask) return (last_cpu); } +#ifndef EARLY_AP_STARTUP /* * Distribute all the interrupt sources among the available * CPUs once the AP's have been launched. @@ -1205,7 +1210,7 @@ intr_irq_shuffle(void *arg __unused) return; mtx_lock(&isrc_table_lock); - irq_assign_cpu = TRUE; + irq_assign_cpu = true; for (i = 0; i < NIRQ; i++) { isrc = irq_sources[i]; if (isrc == NULL || isrc->isrc_handlers == 0 || @@ -1231,6 +1236,7 @@ intr_irq_shuffle(void *arg __unused) mtx_unlock(&isrc_table_lock); } SYSINIT(intr_irq_shuffle, SI_SUB_SMP, SI_ORDER_SECOND, intr_irq_shuffle, NULL); +#endif /* !EARLY_AP_STARTUP */ #else u_int @@ -1239,7 +1245,7 @@ intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask return (PCPU_GET(cpuid)); } -#endif +#endif /* SMP */ /* * Allocate memory for new intr_map_data structure. Modified: head/sys/riscv/riscv/plic.c ============================================================================== --- head/sys/riscv/riscv/plic.c Tue Jul 21 19:56:13 2020 (r363403) +++ head/sys/riscv/riscv/plic.c Tue Jul 21 22:47:02 2020 (r363404) @@ -408,8 +408,7 @@ plic_setup_intr(device_t dev, struct intr_irqsrc *isrc sc = device_get_softc(dev); src = (struct plic_irqsrc *)isrc; - /* Bind to the boot CPU for now. */ - CPU_SET(PCPU_GET(cpuid), &isrc->isrc_cpu); + CPU_ZERO(&isrc->isrc_cpu); plic_bind_intr(dev, isrc); return (0);
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