Date: Sat, 2 Jul 2011 12:56:03 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: cvs-src-old@freebsd.org Subject: cvs commit: src/sys/sparc64/sparc64 exception.S interrupt.S Message-ID: <201107021256.p62CuN8t078772@repoman.freebsd.org>
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marius 2011-07-02 12:56:03 UTC FreeBSD src repository Modified files: sys/sparc64/sparc64 exception.S interrupt.S Log: SVN rev 223721 on 2011-07-02 12:56:03Z by marius UltraSPARC-IV CPUs seem to be affected by a not publicly documented erratum causing them to trigger stray vector interrupts accompanied by a state in which they even fault on locked TLB entries. Just retrying the instruction in that case gets the CPU back on track though. OpenSolaris also just ignores a certain number of stray vector interrupts. While at it, implement the stray vector interrupt handling for SPARC64-VI which use these for indicating uncorrectable errors in interrupt packets. Revision Changes Path 1.89 +2 -1 src/sys/sparc64/sparc64/exception.S 1.13 +24 -0 src/sys/sparc64/sparc64/interrupt.S
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