Date: Fri, 22 Jun 2018 09:26:06 +0000 (UTC) From: Andriy Gapon <avg@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r335543 - stable/10/sys/dev/amdsbwd Message-ID: <201806220926.w5M9Q6p3033686@repo.freebsd.org>
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Author: avg Date: Fri Jun 22 09:26:05 2018 New Revision: 335543 URL: https://svnweb.freebsd.org/changeset/base/335543 Log: MFC r333269: amdsbwd: fix reboot status reporting Modified: stable/10/sys/dev/amdsbwd/amd_chipset.h stable/10/sys/dev/amdsbwd/amdsbwd.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/dev/amdsbwd/amd_chipset.h ============================================================================== --- stable/10/sys/dev/amdsbwd/amd_chipset.h Fri Jun 22 09:25:24 2018 (r335542) +++ stable/10/sys/dev/amdsbwd/amd_chipset.h Fri Jun 22 09:26:05 2018 (r335543) @@ -95,9 +95,10 @@ #define AMDSB8_WDT_32KHZ 0x00 #define AMDSB8_WDT_1HZ 0x03 #define AMDSB8_WDT_RES_MASK 0x03 -#define AMDSB8_PM_RESET_STATUS0 0xc0 -#define AMDSB8_PM_RESET_STATUS1 0xc1 -#define AMDSB8_WD_RST_STS 0x20 +#define AMDSB8_PM_RESET_STATUS 0xc0 /* 32 bit wide */ +#define AMDSB8_WD_RST_STS 0x2000000 +#define AMDSB8_PM_RESET_CTRL 0xc4 +#define AMDSB8_RST_STS_DIS 0x04 /* * Newer FCH registers in the PMIO space. Modified: stable/10/sys/dev/amdsbwd/amdsbwd.c ============================================================================== --- stable/10/sys/dev/amdsbwd/amdsbwd.c Fri Jun 22 09:25:24 2018 (r335542) +++ stable/10/sys/dev/amdsbwd/amdsbwd.c Fri Jun 22 09:26:05 2018 (r335543) @@ -317,16 +317,23 @@ amdsbwd_probe_sb7xx(device_t dev, struct resource *pmr static void amdsbwd_probe_sb8xx(device_t dev, struct resource *pmres, uint32_t *addr) { - uint8_t val; - int i; + uint32_t val; + int i; /* Report cause of previous reset for user's convenience. */ - val = pmio_read(pmres, AMDSB8_PM_RESET_STATUS0); + + val = pmio_read(pmres, AMDSB8_PM_RESET_CTRL); + if ((val & AMDSB8_RST_STS_DIS) != 0) { + val &= ~AMDSB8_RST_STS_DIS; + pmio_write(pmres, AMDSB8_PM_RESET_CTRL, val); + } + val = 0; + for (i = 3; i >= 0; i--) { + val <<= 8; + val |= pmio_read(pmres, AMDSB8_PM_RESET_STATUS + i); + } if (val != 0) - amdsbwd_verbose_printf(dev, "ResetStatus0 = %#04x\n", val); - val = pmio_read(pmres, AMDSB8_PM_RESET_STATUS1); - if (val != 0) - amdsbwd_verbose_printf(dev, "ResetStatus1 = %#04x\n", val); + amdsbwd_verbose_printf(dev, "ResetStatus = 0x%08x\n", val); if ((val & AMDSB8_WD_RST_STS) != 0) device_printf(dev, "Previous Reset was caused by Watchdog\n");
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