Date: Sat, 16 Jul 2011 00:30:23 +0000 (UTC) From: Adrian Chadd <adrian@FreeBSD.org> To: cvs-src-old@freebsd.org Subject: cvs commit: src/sys/mips/malta gt_pci.c Message-ID: <201107160030.p6G0UlJv084856@repoman.freebsd.org>
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adrian 2011-07-16 00:30:23 UTC
FreeBSD src repository
Modified files:
sys/mips/malta gt_pci.c
Log:
SVN rev 224072 on 2011-07-16 00:30:23Z by adrian
The i8259 controller is initialized incorrectly on MALTA. It writes
mask bits to control register and control bits to mask register.
The former causes ICW1_RESET|ICW1_LTIM combination to be written to
control register, which on QEMU results in "level sensitive irq not
supported" error.
Submitted by: Robert Millan <rmh@debian.org>
Revision Changes Path
1.9 +6 -6 src/sys/mips/malta/gt_pci.c
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