Date: Tue, 21 Jun 2011 17:04:01 -0400 From: Jung-uk Kim <jkim@FreeBSD.org> To: freebsd-current@FreeBSD.org Cc: Ian FREISLICH <ianf@clue.co.za> Subject: Re: Time keeping Issues with the low-resolution TSC timecounter Message-ID: <201106211704.04285.jkim@FreeBSD.org> In-Reply-To: <201106211653.34894.jkim@FreeBSD.org> References: <201106171323.43864.jkim@FreeBSD.org> <201106171455.00088.jkim@FreeBSD.org> <201106211653.34894.jkim@FreeBSD.org>
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--Boundary-00=_EdQAOZHMZHeeNzf Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline On Tuesday 21 June 2011 04:53 pm, Jung-uk Kim wrote: > Can you please try the attached patch? It should disable > TSC/TSC-low timecounter for your CPU models, I think. Sorry, I attached a wrong patch. Please ignore the previous one and try this, instead. Jung-uk Kim --Boundary-00=_EdQAOZHMZHeeNzf Content-Type: text/plain; charset="iso-8859-1"; name="tsc_c3.diff" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="tsc_c3.diff" Index: sys/dev/acpica/acpi_cpu.c =================================================================== --- sys/dev/acpica/acpi_cpu.c (revision 223372) +++ sys/dev/acpica/acpi_cpu.c (working copy) @@ -856,6 +856,8 @@ acpi_cpu_cx_list(struct acpi_cpu_softc *sc) sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat); if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) sc->cpu_non_c3 = i; + else + cpu_can_deep_sleep = 1; } sbuf_trim(&sb); sbuf_finish(&sb); Index: sys/kern/kern_clocksource.c =================================================================== --- sys/kern/kern_clocksource.c (revision 223372) +++ sys/kern/kern_clocksource.c (working copy) @@ -59,6 +59,7 @@ __FBSDID("$FreeBSD$"); cyclic_clock_func_t cyclic_clock_func = NULL; #endif +int cpu_can_deep_sleep = 0; /* C3 state is available. */ int cpu_disable_deep_sleep = 0; /* Timer dies in C3. */ static void setuptimer(void); Index: sys/sys/systm.h =================================================================== --- sys/sys/systm.h (revision 223372) +++ sys/sys/systm.h (working copy) @@ -253,6 +253,7 @@ void cpu_startprofclock(void); void cpu_stopprofclock(void); void cpu_idleclock(void); void cpu_activeclock(void); +extern int cpu_can_deep_sleep; extern int cpu_disable_deep_sleep; int cr_cansee(struct ucred *u1, struct ucred *u2); Index: sys/x86/x86/tsc.c =================================================================== --- sys/x86/x86/tsc.c (revision 223372) +++ sys/x86/x86/tsc.c (working copy) @@ -444,6 +444,19 @@ init_TSC_tc(void) goto init; } + /* + * We cannot use the TSC if it stops incrementing in deep sleep. + * Currently only Intel CPUs are known for this problem unless + * the invariant TSC bit is set. + */ + if (cpu_can_deep_sleep && cpu_vendor_id == CPU_VENDOR_INTEL && + (amd_pminfo & AMDPM_TSC_INVARIANT) == 0) { + tsc_timecounter.tc_quality = -1000; + if (bootverbose) + printf("TSC timecounter disabled: C3 enabled.\n"); + goto init; + } + #ifdef SMP /* * We can not use the TSC in SMP mode unless the TSCs on all CPUs are --Boundary-00=_EdQAOZHMZHeeNzf--
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