Date: Mon, 24 May 2010 19:42:27 +0000 (UTC) From: Ryan Stone <rstone@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org Subject: svn commit: r208520 - stable/8/lib/libpmc Message-ID: <201005241942.o4OJgR34096125@svn.freebsd.org>
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Author: rstone Date: Mon May 24 19:42:27 2010 New Revision: 208520 URL: http://svn.freebsd.org/changeset/base/208520 Log: MFC r207482 When configuring hwpmc to use the EXT_SNOOP event, only send a default cachestate qualifier on the Atom processor. Other Intel processors do not accept a cachestate qualifier and currently hwpmc will return EINVAL if you try to use the EXT_SNOOP event on those processors Approved by: emaste (mentor) Modified: stable/8/lib/libpmc/libpmc.c Directory Properties: stable/8/lib/libpmc/ (props changed) Modified: stable/8/lib/libpmc/libpmc.c ============================================================================== --- stable/8/lib/libpmc/libpmc.c Mon May 24 19:36:32 2010 (r208519) +++ stable/8/lib/libpmc/libpmc.c Mon May 24 19:42:27 2010 (r208520) @@ -716,9 +716,16 @@ iap_allocate_pmc(enum pmc_event pe, char case PMC_EV_IAP_EVENT_40H: /* Core */ case PMC_EV_IAP_EVENT_41H: /* Core */ case PMC_EV_IAP_EVENT_42H: /* Core, Core2, Atom */ - case PMC_EV_IAP_EVENT_77H: /* Core */ if (cachestate == 0) cachestate = (0xF << 8); + break; + case PMC_EV_IAP_EVENT_77H: /* Atom */ + /* IAP_EVENT_77H only accepts a cachestate qualifier on the + * Atom processor + */ + if(cpu_info.pm_cputype == PMC_CPU_INTEL_ATOM && cachestate == 0) + cachestate = (0xF << 8); + break; default: break; }
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