Date: Sat, 2 Oct 2010 05:38:45 +0000 (UTC) From: Juli Mallett <jmallett@FreeBSD.org> To: cvs-src-old@freebsd.org Subject: cvs commit: src/sys/mips/cavium uart_bus_octeonusart.c uart_cpu_octeonusart.c uart_dev_oct16550.c Message-ID: <201010020539.o925d6rp087512@repoman.freebsd.org>
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jmallett 2010-10-02 05:38:45 UTC
FreeBSD src repository
Modified files:
sys/mips/cavium uart_bus_octeonusart.c
uart_cpu_octeonusart.c
uart_dev_oct16550.c
Log:
SVN rev 213345 on 2010-10-02 05:38:45Z by jmallett
Rather than shifting offsets by three, set register offset to 3. All our
bus interface does that's special here now is to use a 64-bit register size.
In theory, uart(4) ought to support a regsz as well as regshft and support
64-bit registers directly.
Also use the UART class's range rather than a hand-coded 1024 for the address
range.
Revision Changes Path
1.5 +3 -4 src/sys/mips/cavium/uart_bus_octeonusart.c
1.6 +11 -11 src/sys/mips/cavium/uart_cpu_octeonusart.c
1.5 +1 -1 src/sys/mips/cavium/uart_dev_oct16550.c
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