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Date:      Mon, 21 Aug 2017 07:03:02 +0000 (UTC)
From:      Dimitry Andric <dim@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r322740 - in head: contrib/libc++/include contrib/llvm/include/llvm/CodeGen contrib/llvm/include/llvm/ExecutionEngine/Orc contrib/llvm/include/llvm/Object contrib/llvm/lib/Analysis cont...
Message-ID:  <201708210703.v7L732rA059718@repo.freebsd.org>

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Author: dim
Date: Mon Aug 21 07:03:02 2017
New Revision: 322740
URL: https://svnweb.freebsd.org/changeset/base/322740

Log:
  Upgrade our copies of clang, llvm, lld and libc++ to r311219 from the
  upstream release_50 branch.
  
  MFC after:	2 months
  X-MFC-with:	r321369

Modified:
  head/contrib/libc++/include/string
  head/contrib/llvm/include/llvm/CodeGen/SelectionDAG.h
  head/contrib/llvm/include/llvm/ExecutionEngine/Orc/LazyEmittingLayer.h
  head/contrib/llvm/include/llvm/Object/COFFImportFile.h
  head/contrib/llvm/lib/Analysis/ScalarEvolution.cpp
  head/contrib/llvm/lib/Analysis/ValueTracking.cpp
  head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  head/contrib/llvm/lib/CodeGen/VirtRegMap.cpp
  head/contrib/llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
  head/contrib/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
  head/contrib/llvm/lib/Object/COFFImportFile.cpp
  head/contrib/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
  head/contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
  head/contrib/llvm/lib/Target/ARM/ARMInstrInfo.td
  head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
  head/contrib/llvm/lib/Target/X86/X86InstrAVX512.td
  head/contrib/llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
  head/contrib/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
  head/contrib/llvm/lib/Transforms/Scalar/BDCE.cpp
  head/contrib/llvm/tools/clang/include/clang-c/Index.h
  head/contrib/llvm/tools/clang/include/clang/AST/Decl.h
  head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticDriverKinds.td
  head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticGroups.td
  head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticLexKinds.td
  head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticParseKinds.td
  head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticSemaKinds.td
  head/contrib/llvm/tools/clang/include/clang/Driver/Options.td
  head/contrib/llvm/tools/clang/include/clang/Driver/ToolChain.h
  head/contrib/llvm/tools/clang/include/clang/Frontend/LangStandards.def
  head/contrib/llvm/tools/clang/lib/AST/DeclCXX.cpp
  head/contrib/llvm/tools/clang/lib/AST/ExprCXX.cpp
  head/contrib/llvm/tools/clang/lib/AST/ExprConstant.cpp
  head/contrib/llvm/tools/clang/lib/Basic/Targets.cpp
  head/contrib/llvm/tools/clang/lib/CodeGen/TargetInfo.cpp
  head/contrib/llvm/tools/clang/lib/Driver/ToolChain.cpp
  head/contrib/llvm/tools/clang/lib/Driver/ToolChains/Arch/Mips.cpp
  head/contrib/llvm/tools/clang/lib/Driver/ToolChains/Clang.cpp
  head/contrib/llvm/tools/clang/lib/Driver/ToolChains/CrossWindows.cpp
  head/contrib/llvm/tools/clang/lib/Driver/ToolChains/CrossWindows.h
  head/contrib/llvm/tools/clang/lib/Driver/ToolChains/Darwin.cpp
  head/contrib/llvm/tools/clang/lib/Driver/ToolChains/Darwin.h
  head/contrib/llvm/tools/clang/lib/Driver/ToolChains/Gnu.cpp
  head/contrib/llvm/tools/clang/lib/Driver/ToolChains/Gnu.h
  head/contrib/llvm/tools/clang/lib/Driver/ToolChains/MSVC.cpp
  head/contrib/llvm/tools/clang/lib/Driver/ToolChains/MSVC.h
  head/contrib/llvm/tools/clang/lib/Driver/ToolChains/MinGW.cpp
  head/contrib/llvm/tools/clang/lib/Driver/ToolChains/MinGW.h
  head/contrib/llvm/tools/clang/lib/Driver/ToolChains/NetBSD.h
  head/contrib/llvm/tools/clang/lib/Frontend/InitPreprocessor.cpp
  head/contrib/llvm/tools/clang/lib/Parse/ParseCXXInlineMethods.cpp
  head/contrib/llvm/tools/clang/lib/Sema/SemaCast.cpp
  head/contrib/llvm/tools/clang/lib/Sema/SemaCodeComplete.cpp
  head/contrib/llvm/tools/clang/lib/Sema/SemaDecl.cpp
  head/contrib/llvm/tools/clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
  head/contrib/llvm/tools/lld/COFF/Driver.cpp
  head/contrib/llvm/tools/lld/ELF/Driver.cpp
  head/contrib/llvm/tools/lld/ELF/Options.td
  head/contrib/llvm/tools/llvm-objdump/llvm-objdump.cpp
  head/lib/clang/include/clang/Basic/Version.inc
  head/lib/clang/include/lld/Config/Version.inc
  head/lib/clang/include/llvm/Support/VCSRevision.h
Directory Properties:
  head/contrib/compiler-rt/   (props changed)
  head/contrib/libc++/   (props changed)
  head/contrib/llvm/   (props changed)
  head/contrib/llvm/tools/clang/   (props changed)
  head/contrib/llvm/tools/lld/   (props changed)
  head/contrib/llvm/tools/lldb/   (props changed)

Modified: head/contrib/libc++/include/string
==============================================================================
--- head/contrib/libc++/include/string	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/libc++/include/string	Mon Aug 21 07:03:02 2017	(r322740)
@@ -556,6 +556,8 @@ template<class _CharT, class _Traits, class _Allocator
 basic_string<_CharT, _Traits, _Allocator>
 operator+(const basic_string<_CharT, _Traits, _Allocator>& __x, _CharT __y);
 
+_LIBCPP_EXTERN_TEMPLATE(_LIBCPP_FUNC_VIS string operator+<char, char_traits<char>, allocator<char> >(char const*, string const&))
+
 template <bool>
 class _LIBCPP_TEMPLATE_VIS __basic_string_common
 {
@@ -3999,7 +4001,6 @@ basic_string<_CharT, _Traits, _Allocator>::__subscript
 
 _LIBCPP_EXTERN_TEMPLATE(class _LIBCPP_EXTERN_TEMPLATE_TYPE_VIS basic_string<char>)
 _LIBCPP_EXTERN_TEMPLATE(class _LIBCPP_EXTERN_TEMPLATE_TYPE_VIS basic_string<wchar_t>)
-_LIBCPP_EXTERN_TEMPLATE(_LIBCPP_FUNC_VIS string operator+<char, char_traits<char>, allocator<char> >(char const*, string const&))
 
 #if _LIBCPP_STD_VER > 11 
 // Literal suffixes for basic_string [basic.string.literals]

Modified: head/contrib/llvm/include/llvm/CodeGen/SelectionDAG.h
==============================================================================
--- head/contrib/llvm/include/llvm/CodeGen/SelectionDAG.h	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/include/llvm/CodeGen/SelectionDAG.h	Mon Aug 21 07:03:02 2017	(r322740)
@@ -1220,8 +1220,9 @@ class SelectionDAG { (public)
   /// If an existing load has uses of its chain, create a token factor node with
   /// that chain and the new memory node's chain and update users of the old
   /// chain to the token factor. This ensures that the new memory node will have
-  /// the same relative memory dependency position as the old load.
-  void makeEquivalentMemoryOrdering(LoadSDNode *Old, SDValue New);
+  /// the same relative memory dependency position as the old load. Returns the
+  /// new merged load chain.
+  SDValue makeEquivalentMemoryOrdering(LoadSDNode *Old, SDValue New);
 
   /// Topological-sort the AllNodes list and a
   /// assign a unique node id for each node in the DAG based on their

Modified: head/contrib/llvm/include/llvm/ExecutionEngine/Orc/LazyEmittingLayer.h
==============================================================================
--- head/contrib/llvm/include/llvm/ExecutionEngine/Orc/LazyEmittingLayer.h	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/include/llvm/ExecutionEngine/Orc/LazyEmittingLayer.h	Mon Aug 21 07:03:02 2017	(r322740)
@@ -94,9 +94,9 @@ template <typename BaseLayerT> class LazyEmittingLayer
       llvm_unreachable("Invalid emit-state.");
     }
 
-    void removeModuleFromBaseLayer(BaseLayerT &BaseLayer) {
-      if (EmitState != NotEmitted)
-        BaseLayer.removeModule(Handle);
+    Error removeModuleFromBaseLayer(BaseLayerT& BaseLayer) {
+      return EmitState != NotEmitted ? BaseLayer.removeModule(Handle)
+                                     : Error::success();
     }
 
     void emitAndFinalize(BaseLayerT &BaseLayer) {
@@ -226,9 +226,9 @@ template <typename BaseLayerT> class LazyEmittingLayer
   ///   This method will free the memory associated with the given module, both
   /// in this layer, and the base layer.
   Error removeModule(ModuleHandleT H) {
-    (*H)->removeModuleFromBaseLayer(BaseLayer);
+    Error Err = (*H)->removeModuleFromBaseLayer(BaseLayer);
     ModuleList.erase(H);
-    return Error::success();
+    return Err;
   }
 
   /// @brief Search for the given named symbol.

Modified: head/contrib/llvm/include/llvm/Object/COFFImportFile.h
==============================================================================
--- head/contrib/llvm/include/llvm/Object/COFFImportFile.h	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/include/llvm/Object/COFFImportFile.h	Mon Aug 21 07:03:02 2017	(r322740)
@@ -73,6 +73,7 @@ class COFFImportFile : public SymbolicFile { (private)
 struct COFFShortExport {
   std::string Name;
   std::string ExtName;
+  std::string SymbolName;
 
   uint16_t Ordinal = 0;
   bool Noname = false;
@@ -98,7 +99,8 @@ struct COFFShortExport {
 std::error_code writeImportLibrary(StringRef ImportName,
                                    StringRef Path,
                                    ArrayRef<COFFShortExport> Exports,
-                                   COFF::MachineTypes Machine);
+                                   COFF::MachineTypes Machine,
+                                   bool MakeWeakAliases);
 
 } // namespace object
 } // namespace llvm

Modified: head/contrib/llvm/lib/Analysis/ScalarEvolution.cpp
==============================================================================
--- head/contrib/llvm/lib/Analysis/ScalarEvolution.cpp	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/Analysis/ScalarEvolution.cpp	Mon Aug 21 07:03:02 2017	(r322740)
@@ -162,6 +162,11 @@ static cl::opt<unsigned>
                 cl::desc("Maximum depth of recursive SExt/ZExt"),
                 cl::init(8));
 
+static cl::opt<unsigned>
+    MaxAddRecSize("scalar-evolution-max-add-rec-size", cl::Hidden,
+                  cl::desc("Max coefficients in AddRec during evolving"),
+                  cl::init(16));
+
 //===----------------------------------------------------------------------===//
 //                           SCEV class definitions
 //===----------------------------------------------------------------------===//
@@ -2878,6 +2883,12 @@ const SCEV *ScalarEvolution::getMulExpr(SmallVectorImp
       if (!OtherAddRec || OtherAddRec->getLoop() != AddRecLoop)
         continue;
 
+      // Limit max number of arguments to avoid creation of unreasonably big
+      // SCEVAddRecs with very complex operands.
+      if (AddRec->getNumOperands() + OtherAddRec->getNumOperands() - 1 >
+          MaxAddRecSize)
+        continue;
+
       bool Overflow = false;
       Type *Ty = AddRec->getType();
       bool LargerThan64Bits = getTypeSizeInBits(Ty) > 64;
@@ -7582,6 +7593,25 @@ const SCEV *ScalarEvolution::computeSCEVAtScope(const 
             const SCEV *BackedgeTakenCount = getBackedgeTakenCount(LI);
             if (const SCEVConstant *BTCC =
                   dyn_cast<SCEVConstant>(BackedgeTakenCount)) {
+
+              // This trivial case can show up in some degenerate cases where
+              // the incoming IR has not yet been fully simplified.
+              if (BTCC->getValue()->isZero()) {
+                Value *InitValue = nullptr;
+                bool MultipleInitValues = false;
+                for (unsigned i = 0; i < PN->getNumIncomingValues(); i++) {
+                  if (!LI->contains(PN->getIncomingBlock(i))) {
+                    if (!InitValue)
+                      InitValue = PN->getIncomingValue(i);
+                    else if (InitValue != PN->getIncomingValue(i)) {
+                      MultipleInitValues = true;
+                      break;
+                    }
+                  }
+                  if (!MultipleInitValues && InitValue)
+                    return getSCEV(InitValue);
+                }
+              }
               // Okay, we know how many times the containing loop executes.  If
               // this is a constant evolving PHI node, get the final value at
               // the specified iteration number.

Modified: head/contrib/llvm/lib/Analysis/ValueTracking.cpp
==============================================================================
--- head/contrib/llvm/lib/Analysis/ValueTracking.cpp	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/Analysis/ValueTracking.cpp	Mon Aug 21 07:03:02 2017	(r322740)
@@ -4458,6 +4458,10 @@ Optional<bool> llvm::isImpliedCondition(const Value *L
                                         unsigned Depth, AssumptionCache *AC,
                                         const Instruction *CxtI,
                                         const DominatorTree *DT) {
+  // Bail out when we hit the limit.
+  if (Depth == MaxDepth)
+    return None;
+
   // A mismatch occurs when we compare a scalar cmp to a vector cmp, for example.
   if (LHS->getType() != RHS->getType())
     return None;

Modified: head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
==============================================================================
--- head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp	Mon Aug 21 07:03:02 2017	(r322740)
@@ -302,7 +302,21 @@ SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VE
 }
 
 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSELECT(SDNode *N) {
-  SDValue Cond = GetScalarizedVector(N->getOperand(0));
+  SDValue Cond = N->getOperand(0);
+  EVT OpVT = Cond.getValueType();
+  SDLoc DL(N);
+  // The vselect result and true/value operands needs scalarizing, but it's
+  // not a given that the Cond does. For instance, in AVX512 v1i1 is legal.
+  // See the similar logic in ScalarizeVecRes_VSETCC
+  if (getTypeAction(OpVT) == TargetLowering::TypeScalarizeVector) {
+    Cond = GetScalarizedVector(Cond);
+  } else {
+    EVT VT = OpVT.getVectorElementType();
+    Cond = DAG.getNode(
+        ISD::EXTRACT_VECTOR_ELT, DL, VT, Cond,
+        DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
+  }
+
   SDValue LHS = GetScalarizedVector(N->getOperand(1));
   TargetLowering::BooleanContent ScalarBool =
       TLI.getBooleanContents(false, false);

Modified: head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
==============================================================================
--- head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp	Mon Aug 21 07:03:02 2017	(r322740)
@@ -7262,22 +7262,23 @@ void SelectionDAG::TransferDbgValues(SDValue From, SDV
     AddDbgValue(I, ToNode, false);
 }
 
-void SelectionDAG::makeEquivalentMemoryOrdering(LoadSDNode *OldLoad,
-                                                SDValue NewMemOp) {
+SDValue SelectionDAG::makeEquivalentMemoryOrdering(LoadSDNode *OldLoad,
+                                                   SDValue NewMemOp) {
   assert(isa<MemSDNode>(NewMemOp.getNode()) && "Expected a memop node");
-  if (!OldLoad->hasAnyUseOfValue(1))
-    return;
-
   // The new memory operation must have the same position as the old load in
   // terms of memory dependency. Create a TokenFactor for the old load and new
   // memory operation and update uses of the old load's output chain to use that
   // TokenFactor.
   SDValue OldChain = SDValue(OldLoad, 1);
   SDValue NewChain = SDValue(NewMemOp.getNode(), 1);
+  if (!OldLoad->hasAnyUseOfValue(1))
+    return NewChain;
+
   SDValue TokenFactor =
       getNode(ISD::TokenFactor, SDLoc(OldLoad), MVT::Other, OldChain, NewChain);
   ReplaceAllUsesOfValueWith(OldChain, TokenFactor);
   UpdateNodeOperands(TokenFactor.getNode(), OldChain, NewChain);
+  return TokenFactor;
 }
 
 //===----------------------------------------------------------------------===//

Modified: head/contrib/llvm/lib/CodeGen/VirtRegMap.cpp
==============================================================================
--- head/contrib/llvm/lib/CodeGen/VirtRegMap.cpp	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/CodeGen/VirtRegMap.cpp	Mon Aug 21 07:03:02 2017	(r322740)
@@ -180,6 +180,7 @@ class VirtRegRewriter : public MachineFunctionPass {
   void addLiveInsForSubRanges(const LiveInterval &LI, unsigned PhysReg) const;
   void handleIdentityCopy(MachineInstr &MI) const;
   void expandCopyBundle(MachineInstr &MI) const;
+  bool subRegLiveThrough(const MachineInstr &MI, unsigned SuperPhysReg) const;
 
 public:
   static char ID;
@@ -415,6 +416,32 @@ void VirtRegRewriter::expandCopyBundle(MachineInstr &M
   }
 }
 
+/// Check whether (part of) \p SuperPhysReg is live through \p MI.
+/// \pre \p MI defines a subregister of a virtual register that
+/// has been assigned to \p SuperPhysReg.
+bool VirtRegRewriter::subRegLiveThrough(const MachineInstr &MI,
+                                        unsigned SuperPhysReg) const {
+  SlotIndex MIIndex = LIS->getInstructionIndex(MI);
+  SlotIndex BeforeMIUses = MIIndex.getBaseIndex();
+  SlotIndex AfterMIDefs = MIIndex.getBoundaryIndex();
+  for (MCRegUnitIterator Unit(SuperPhysReg, TRI); Unit.isValid(); ++Unit) {
+    const LiveRange &UnitRange = LIS->getRegUnit(*Unit);
+    // If the regunit is live both before and after MI,
+    // we assume it is live through.
+    // Generally speaking, this is not true, because something like
+    // "RU = op RU" would match that description.
+    // However, we know that we are trying to assess whether
+    // a def of a virtual reg, vreg, is live at the same time of RU.
+    // If we are in the "RU = op RU" situation, that means that vreg
+    // is defined at the same time as RU (i.e., "vreg, RU = op RU").
+    // Thus, vreg and RU interferes and vreg cannot be assigned to
+    // SuperPhysReg. Therefore, this situation cannot happen.
+    if (UnitRange.liveAt(AfterMIDefs) && UnitRange.liveAt(BeforeMIUses))
+      return true;
+  }
+  return false;
+}
+
 void VirtRegRewriter::rewrite() {
   bool NoSubRegLiveness = !MRI->subRegLivenessEnabled();
   SmallVector<unsigned, 8> SuperDeads;
@@ -452,7 +479,8 @@ void VirtRegRewriter::rewrite() {
             // A virtual register kill refers to the whole register, so we may
             // have to add <imp-use,kill> operands for the super-register.  A
             // partial redef always kills and redefines the super-register.
-            if (MO.readsReg() && (MO.isDef() || MO.isKill()))
+            if ((MO.readsReg() && (MO.isDef() || MO.isKill())) ||
+                (MO.isDef() && subRegLiveThrough(*MI, PhysReg)))
               SuperKills.push_back(PhysReg);
 
             if (MO.isDef()) {

Modified: head/contrib/llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
==============================================================================
--- head/contrib/llvm/lib/DebugInfo/DWARF/DWARFContext.cpp	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/DebugInfo/DWARF/DWARFContext.cpp	Mon Aug 21 07:03:02 2017	(r322740)
@@ -134,13 +134,13 @@ dumpDWARFv5StringOffsetsSection(raw_ostream &OS, Strin
       uint64_t StringOffset =
           StrOffsetExt.getRelocatedValue(EntrySize, &Offset);
       if (Format == DWARF32) {
-        OS << format("%8.8x ", StringOffset);
         uint32_t StringOffset32 = (uint32_t)StringOffset;
+        OS << format("%8.8x ", StringOffset32);
         const char *S = StrData.getCStr(&StringOffset32);
         if (S)
           OS << format("\"%s\"", S);
       } else
-        OS << format("%16.16x ", StringOffset);
+        OS << format("%16.16" PRIx64 " ", StringOffset);
       OS << "\n";
     }
   }

Modified: head/contrib/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
==============================================================================
--- head/contrib/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp	Mon Aug 21 07:03:02 2017	(r322740)
@@ -196,7 +196,7 @@ unsigned DWARFVerifier::verifyDebugInfoAttribute(const
         ++NumErrors;
         OS << "error: DW_AT_stmt_list offset is beyond .debug_line "
               "bounds: "
-           << format("0x%08" PRIx32, *SectionOffset) << "\n";
+           << format("0x%08" PRIx64, *SectionOffset) << "\n";
         Die.dump(OS, 0);
         OS << "\n";
       }
@@ -234,7 +234,7 @@ unsigned DWARFVerifier::verifyDebugInfoForm(const DWAR
       if (CUOffset >= CUSize) {
         ++NumErrors;
         OS << "error: " << FormEncodingString(Form) << " CU offset "
-           << format("0x%08" PRIx32, CUOffset)
+           << format("0x%08" PRIx64, CUOffset)
            << " is invalid (must be less than CU size of "
            << format("0x%08" PRIx32, CUSize) << "):\n";
         Die.dump(OS, 0);
@@ -366,7 +366,7 @@ void DWARFVerifier::verifyDebugLineRows() {
       if (Row.Address < PrevAddress) {
         ++NumDebugLineErrors;
         OS << "error: .debug_line["
-           << format("0x%08" PRIx32,
+           << format("0x%08" PRIx64,
                      *toSectionOffset(Die.find(DW_AT_stmt_list)))
            << "] row[" << RowIndex
            << "] decreases in address from previous row:\n";
@@ -381,7 +381,7 @@ void DWARFVerifier::verifyDebugLineRows() {
       if (Row.File > MaxFileIndex) {
         ++NumDebugLineErrors;
         OS << "error: .debug_line["
-           << format("0x%08" PRIx32,
+           << format("0x%08" PRIx64,
                      *toSectionOffset(Die.find(DW_AT_stmt_list)))
            << "][" << RowIndex << "] has invalid file index " << Row.File
            << " (valid values are [1," << MaxFileIndex << "]):\n";

Modified: head/contrib/llvm/lib/Object/COFFImportFile.cpp
==============================================================================
--- head/contrib/llvm/lib/Object/COFFImportFile.cpp	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/Object/COFFImportFile.cpp	Mon Aug 21 07:03:02 2017	(r322740)
@@ -557,7 +557,7 @@ NewArchiveMember ObjectFactory::createWeakExternal(Str
 
 std::error_code writeImportLibrary(StringRef ImportName, StringRef Path,
                                    ArrayRef<COFFShortExport> Exports,
-                                   MachineTypes Machine) {
+                                   MachineTypes Machine, bool MakeWeakAliases) {
 
   std::vector<NewArchiveMember> Members;
   ObjectFactory OF(llvm::sys::path::filename(ImportName), Machine);
@@ -575,7 +575,7 @@ std::error_code writeImportLibrary(StringRef ImportNam
     if (E.Private)
       continue;
 
-    if (E.isWeak()) {
+    if (E.isWeak() && MakeWeakAliases) {
       Members.push_back(OF.createWeakExternal(E.Name, E.ExtName, false));
       Members.push_back(OF.createWeakExternal(E.Name, E.ExtName, true));
       continue;
@@ -587,7 +587,7 @@ std::error_code writeImportLibrary(StringRef ImportNam
     if (E.Constant)
       ImportType = IMPORT_CONST;
 
-    StringRef SymbolName = E.isWeak() ? E.ExtName : E.Name;
+    StringRef SymbolName = E.SymbolName.empty() ? E.Name : E.SymbolName;
     ImportNameType NameType = getNameType(SymbolName, E.Name, Machine);
     Expected<std::string> Name = E.ExtName.empty()
                                      ? SymbolName

Modified: head/contrib/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
==============================================================================
--- head/contrib/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp	Mon Aug 21 07:03:02 2017	(r322740)
@@ -388,6 +388,10 @@ static unsigned isMatchingStore(MachineInstr &LoadInst
 }
 
 static unsigned getPreIndexedOpcode(unsigned Opc) {
+  // FIXME: We don't currently support creating pre-indexed loads/stores when
+  // the load or store is the unscaled version.  If we decide to perform such an
+  // optimization in the future the cases for the unscaled loads/stores will
+  // need to be added here.
   switch (Opc) {
   default:
     llvm_unreachable("Opcode has no pre-indexed equivalent!");
@@ -451,32 +455,42 @@ static unsigned getPostIndexedOpcode(unsigned Opc) {
   default:
     llvm_unreachable("Opcode has no post-indexed wise equivalent!");
   case AArch64::STRSui:
+  case AArch64::STURSi:
     return AArch64::STRSpost;
   case AArch64::STRDui:
+  case AArch64::STURDi:
     return AArch64::STRDpost;
   case AArch64::STRQui:
+  case AArch64::STURQi:
     return AArch64::STRQpost;
   case AArch64::STRBBui:
     return AArch64::STRBBpost;
   case AArch64::STRHHui:
     return AArch64::STRHHpost;
   case AArch64::STRWui:
+  case AArch64::STURWi:
     return AArch64::STRWpost;
   case AArch64::STRXui:
+  case AArch64::STURXi:
     return AArch64::STRXpost;
   case AArch64::LDRSui:
+  case AArch64::LDURSi:
     return AArch64::LDRSpost;
   case AArch64::LDRDui:
+  case AArch64::LDURDi:
     return AArch64::LDRDpost;
   case AArch64::LDRQui:
+  case AArch64::LDURQi:
     return AArch64::LDRQpost;
   case AArch64::LDRBBui:
     return AArch64::LDRBBpost;
   case AArch64::LDRHHui:
     return AArch64::LDRHHpost;
   case AArch64::LDRWui:
+  case AArch64::LDURWi:
     return AArch64::LDRWpost;
   case AArch64::LDRXui:
+  case AArch64::LDURXi:
     return AArch64::LDRXpost;
   case AArch64::LDRSWui:
     return AArch64::LDRSWpost;
@@ -1694,8 +1708,9 @@ bool AArch64LoadStoreOpt::optimizeBlock(MachineBasicBl
         ++NumPostFolded;
         break;
       }
-      // Don't know how to handle pre/post-index versions, so move to the next
-      // instruction.
+
+      // Don't know how to handle unscaled pre/post-index versions below, so
+      // move to the next instruction.
       if (TII->isUnscaledLdSt(Opc)) {
         ++MBBI;
         break;

Modified: head/contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
==============================================================================
--- head/contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp	Mon Aug 21 07:03:02 2017	(r322740)
@@ -769,8 +769,7 @@ bool ARMExpandPseudo::ExpandCMP_SWAP(MachineBasicBlock
   MachineInstr &MI = *MBBI;
   DebugLoc DL = MI.getDebugLoc();
   const MachineOperand &Dest = MI.getOperand(0);
-  unsigned StatusReg = MI.getOperand(1).getReg();
-  bool StatusDead = MI.getOperand(1).isDead();
+  unsigned TempReg = MI.getOperand(1).getReg();
   // Duplicating undef operands into 2 instructions does not guarantee the same
   // value on both; However undef should be replaced by xzr anyway.
   assert(!MI.getOperand(2).isUndef() && "cannot handle undef");
@@ -797,23 +796,9 @@ bool ARMExpandPseudo::ExpandCMP_SWAP(MachineBasicBlock
   }
 
   // .Lloadcmp:
-  //     mov wStatus, #0
   //     ldrex rDest, [rAddr]
   //     cmp rDest, rDesired
   //     bne .Ldone
-  if (!StatusDead) {
-    if (IsThumb) {
-      BuildMI(LoadCmpBB, DL, TII->get(ARM::tMOVi8), StatusReg)
-        .addDef(ARM::CPSR, RegState::Dead)
-        .addImm(0)
-        .add(predOps(ARMCC::AL));
-    } else {
-      BuildMI(LoadCmpBB, DL, TII->get(ARM::MOVi), StatusReg)
-        .addImm(0)
-        .add(predOps(ARMCC::AL))
-        .add(condCodeOp());
-    }
-  }
 
   MachineInstrBuilder MIB;
   MIB = BuildMI(LoadCmpBB, DL, TII->get(LdrexOp), Dest.getReg());
@@ -836,10 +821,10 @@ bool ARMExpandPseudo::ExpandCMP_SWAP(MachineBasicBlock
   LoadCmpBB->addSuccessor(StoreBB);
 
   // .Lstore:
-  //     strex rStatus, rNew, [rAddr]
-  //     cmp rStatus, #0
+  //     strex rTempReg, rNew, [rAddr]
+  //     cmp rTempReg, #0
   //     bne .Lloadcmp
-  MIB = BuildMI(StoreBB, DL, TII->get(StrexOp), StatusReg)
+  MIB = BuildMI(StoreBB, DL, TII->get(StrexOp), TempReg)
     .addReg(NewReg)
     .addReg(AddrReg);
   if (StrexOp == ARM::t2STREX)
@@ -848,7 +833,7 @@ bool ARMExpandPseudo::ExpandCMP_SWAP(MachineBasicBlock
 
   unsigned CMPri = IsThumb ? ARM::t2CMPri : ARM::CMPri;
   BuildMI(StoreBB, DL, TII->get(CMPri))
-      .addReg(StatusReg, getKillRegState(StatusDead))
+      .addReg(TempReg, RegState::Kill)
       .addImm(0)
       .add(predOps(ARMCC::AL));
   BuildMI(StoreBB, DL, TII->get(Bcc))
@@ -904,8 +889,7 @@ bool ARMExpandPseudo::ExpandCMP_SWAP_64(MachineBasicBl
   MachineInstr &MI = *MBBI;
   DebugLoc DL = MI.getDebugLoc();
   MachineOperand &Dest = MI.getOperand(0);
-  unsigned StatusReg = MI.getOperand(1).getReg();
-  bool StatusDead = MI.getOperand(1).isDead();
+  unsigned TempReg = MI.getOperand(1).getReg();
   // Duplicating undef operands into 2 instructions does not guarantee the same
   // value on both; However undef should be replaced by xzr anyway.
   assert(!MI.getOperand(2).isUndef() && "cannot handle undef");
@@ -931,7 +915,7 @@ bool ARMExpandPseudo::ExpandCMP_SWAP_64(MachineBasicBl
   // .Lloadcmp:
   //     ldrexd rDestLo, rDestHi, [rAddr]
   //     cmp rDestLo, rDesiredLo
-  //     sbcs rStatus<dead>, rDestHi, rDesiredHi
+  //     sbcs rTempReg<dead>, rDestHi, rDesiredHi
   //     bne .Ldone
   unsigned LDREXD = IsThumb ? ARM::t2LDREXD : ARM::LDREXD;
   MachineInstrBuilder MIB;
@@ -959,17 +943,17 @@ bool ARMExpandPseudo::ExpandCMP_SWAP_64(MachineBasicBl
   LoadCmpBB->addSuccessor(StoreBB);
 
   // .Lstore:
-  //     strexd rStatus, rNewLo, rNewHi, [rAddr]
-  //     cmp rStatus, #0
+  //     strexd rTempReg, rNewLo, rNewHi, [rAddr]
+  //     cmp rTempReg, #0
   //     bne .Lloadcmp
   unsigned STREXD = IsThumb ? ARM::t2STREXD : ARM::STREXD;
-  MIB = BuildMI(StoreBB, DL, TII->get(STREXD), StatusReg);
+  MIB = BuildMI(StoreBB, DL, TII->get(STREXD), TempReg);
   addExclusiveRegPair(MIB, New, 0, IsThumb, TRI);
   MIB.addReg(AddrReg).add(predOps(ARMCC::AL));
 
   unsigned CMPri = IsThumb ? ARM::t2CMPri : ARM::CMPri;
   BuildMI(StoreBB, DL, TII->get(CMPri))
-      .addReg(StatusReg, getKillRegState(StatusDead))
+      .addReg(TempReg, RegState::Kill)
       .addImm(0)
       .add(predOps(ARMCC::AL));
   BuildMI(StoreBB, DL, TII->get(Bcc))

Modified: head/contrib/llvm/lib/Target/ARM/ARMInstrInfo.td
==============================================================================
--- head/contrib/llvm/lib/Target/ARM/ARMInstrInfo.td	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/Target/ARM/ARMInstrInfo.td	Mon Aug 21 07:03:02 2017	(r322740)
@@ -6053,21 +6053,21 @@ def SPACE : PseudoInst<(outs GPR:$Rd), (ins i32imm:$si
 // significantly more naive than the standard expansion: we conservatively
 // assume seq_cst, strong cmpxchg and omit clrex on failure.
 
-let Constraints = "@earlyclobber $Rd,@earlyclobber $status",
+let Constraints = "@earlyclobber $Rd,@earlyclobber $temp",
     mayLoad = 1, mayStore = 1 in {
-def CMP_SWAP_8 : PseudoInst<(outs GPR:$Rd, GPR:$status),
+def CMP_SWAP_8 : PseudoInst<(outs GPR:$Rd, GPR:$temp),
                             (ins GPR:$addr, GPR:$desired, GPR:$new),
                             NoItinerary, []>, Sched<[]>;
 
-def CMP_SWAP_16 : PseudoInst<(outs GPR:$Rd, GPR:$status),
+def CMP_SWAP_16 : PseudoInst<(outs GPR:$Rd, GPR:$temp),
                              (ins GPR:$addr, GPR:$desired, GPR:$new),
                              NoItinerary, []>, Sched<[]>;
 
-def CMP_SWAP_32 : PseudoInst<(outs GPR:$Rd, GPR:$status),
+def CMP_SWAP_32 : PseudoInst<(outs GPR:$Rd, GPR:$temp),
                              (ins GPR:$addr, GPR:$desired, GPR:$new),
                              NoItinerary, []>, Sched<[]>;
 
-def CMP_SWAP_64 : PseudoInst<(outs GPRPair:$Rd, GPR:$status),
+def CMP_SWAP_64 : PseudoInst<(outs GPRPair:$Rd, GPR:$temp),
                              (ins GPR:$addr, GPRPair:$desired, GPRPair:$new),
                              NoItinerary, []>, Sched<[]>;
 }

Modified: head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
==============================================================================
--- head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp	Mon Aug 21 07:03:02 2017	(r322740)
@@ -419,6 +419,11 @@ X86TargetLowering::X86TargetLowering(const X86TargetMa
     setOperationAction(ISD::SELECT, VT, Custom);
     setOperationAction(ISD::SETCC,  VT, Custom);
   }
+
+  // Custom action for SELECT MMX and expand action for SELECT_CC MMX
+  setOperationAction(ISD::SELECT, MVT::x86mmx, Custom);
+  setOperationAction(ISD::SELECT_CC, MVT::x86mmx, Expand);
+
   setOperationAction(ISD::EH_RETURN       , MVT::Other, Custom);
   // NOTE: EH_SJLJ_SETJMP/_LONGJMP supported here is NOT intended to support
   // SjLj exception handling but a light-weight setjmp/longjmp replacement to
@@ -1383,7 +1388,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMa
     // (result) is 256-bit but the source is 512-bit wide.
     // 128-bit was made Custom under AVX1.
     for (auto VT : { MVT::v32i8, MVT::v16i16, MVT::v8i32, MVT::v4i64,
-                     MVT::v8f32, MVT::v4f64 })
+                     MVT::v8f32, MVT::v4f64, MVT::v1i1 })
       setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Custom);
     for (auto VT : { MVT::v2i1, MVT::v4i1, MVT::v8i1,
                      MVT::v16i1, MVT::v32i1, MVT::v64i1 })
@@ -14570,6 +14575,21 @@ static SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, cons
   unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
   MVT ResVT = Op.getSimpleValueType();
 
+  // When v1i1 is legal a scalarization of a vselect with a vXi1 Cond
+  // would result with: v1i1 = extract_subvector(vXi1, idx).
+  // Lower these into extract_vector_elt which is already selectable.
+  if (ResVT == MVT::v1i1) {
+    assert(Subtarget.hasAVX512() &&
+           "Boolean EXTRACT_SUBVECTOR requires AVX512");
+
+    MVT EltVT = ResVT.getVectorElementType();
+    const TargetLowering &TLI = DAG.getTargetLoweringInfo();
+    MVT LegalVT =
+        (TLI.getTypeToTransformTo(*DAG.getContext(), EltVT)).getSimpleVT();
+    SDValue Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, LegalVT, In, Idx);
+    return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, ResVT, Res);
+  }
+
   assert((In.getSimpleValueType().is256BitVector() ||
           In.getSimpleValueType().is512BitVector()) &&
          "Can only extract from 256-bit or 512-bit vectors");
@@ -20651,8 +20671,8 @@ static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, cons
   }
   // ADC/ADCX/SBB
   case ADX: {
-    SDVTList CFVTs = DAG.getVTList(Op->getValueType(0), MVT::Other);
-    SDVTList VTs = DAG.getVTList(Op.getOperand(3)->getValueType(0), MVT::Other);
+    SDVTList CFVTs = DAG.getVTList(Op->getValueType(0), MVT::i32);
+    SDVTList VTs = DAG.getVTList(Op.getOperand(3)->getValueType(0), MVT::i32);
     SDValue GenCF = DAG.getNode(X86ISD::ADD, dl, CFVTs, Op.getOperand(2),
                                 DAG.getConstant(-1, dl, MVT::i8));
     SDValue Res = DAG.getNode(IntrData->Opc0, dl, VTs, Op.getOperand(3),
@@ -30663,6 +30683,14 @@ static SDValue combineSelect(SDNode *N, SelectionDAG &
       return SDValue(N, 0);
   }
 
+  // Custom action for SELECT MMX
+  if (VT == MVT::x86mmx) {
+    LHS = DAG.getBitcast(MVT::i64, LHS);
+    RHS = DAG.getBitcast(MVT::i64, RHS);
+    SDValue newSelect = DAG.getNode(ISD::SELECT, DL, MVT::i64, Cond, LHS, RHS);
+    return DAG.getBitcast(VT, newSelect);
+  }
+
   return SDValue();
 }
 
@@ -33358,7 +33386,8 @@ static SDValue combineStore(SDNode *N, SelectionDAG &D
       SDValue NewLd = DAG.getLoad(LdVT, LdDL, Ld->getChain(), Ld->getBasePtr(),
                                   Ld->getPointerInfo(), Ld->getAlignment(),
                                   Ld->getMemOperand()->getFlags());
-      SDValue NewChain = NewLd.getValue(1);
+      // Make sure new load is placed in same chain order.
+      SDValue NewChain = DAG.makeEquivalentMemoryOrdering(Ld, NewLd);
       if (TokenFactorIndex >= 0) {
         Ops.push_back(NewChain);
         NewChain = DAG.getNode(ISD::TokenFactor, LdDL, MVT::Other, Ops);
@@ -33379,11 +33408,12 @@ static SDValue combineStore(SDNode *N, SelectionDAG &D
                                Ld->getPointerInfo().getWithOffset(4),
                                MinAlign(Ld->getAlignment(), 4),
                                Ld->getMemOperand()->getFlags());
+    // Make sure new loads are placed in same chain order.
+    SDValue NewChain = DAG.makeEquivalentMemoryOrdering(Ld, LoLd);
+    NewChain = DAG.makeEquivalentMemoryOrdering(Ld, HiLd);
 
-    SDValue NewChain = LoLd.getValue(1);
     if (TokenFactorIndex >= 0) {
-      Ops.push_back(LoLd);
-      Ops.push_back(HiLd);
+      Ops.push_back(NewChain);
       NewChain = DAG.getNode(ISD::TokenFactor, LdDL, MVT::Other, Ops);
     }
 

Modified: head/contrib/llvm/lib/Target/X86/X86InstrAVX512.td
==============================================================================
--- head/contrib/llvm/lib/Target/X86/X86InstrAVX512.td	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/Target/X86/X86InstrAVX512.td	Mon Aug 21 07:03:02 2017	(r322740)
@@ -978,6 +978,44 @@ multiclass avx512_int_broadcast_reg<bits<8> opc, X86Ve
                          (_.VT (OpNode SrcRC:$src))>, T8PD, EVEX;
 }
 
+multiclass avx512_int_broadcastbw_reg<bits<8> opc, string Name, 
+                                    X86VectorVTInfo _, SDPatternOperator OpNode,
+                                    RegisterClass SrcRC, SubRegIndex Subreg> {
+  let ExeDomain = _.ExeDomain in
+  defm r : AVX512_maskable_custom<opc, MRMSrcReg,
+                        (outs _.RC:$dst), (ins GR32:$src),
+                        !con((ins _.RC:$src0, _.KRCWM:$mask), (ins GR32:$src)),
+                        !con((ins _.KRCWM:$mask), (ins GR32:$src)),
+                        "vpbroadcast"##_.Suffix, "$src", "$src", [], [], [],
+                        "$src0 = $dst">, T8PD, EVEX;
+
+  def : Pat <(_.VT (OpNode SrcRC:$src)),
+             (!cast<Instruction>(Name#r)
+              (i32 (INSERT_SUBREG (i32 (IMPLICIT_DEF)), SrcRC:$src, Subreg)))>;
+
+  def : Pat <(vselect _.KRCWM:$mask, (_.VT (OpNode SrcRC:$src)), _.RC:$src0),
+             (!cast<Instruction>(Name#rk) _.RC:$src0, _.KRCWM:$mask,
+              (i32 (INSERT_SUBREG (i32 (IMPLICIT_DEF)), SrcRC:$src, Subreg)))>;
+
+  def : Pat <(vselect _.KRCWM:$mask, (_.VT (OpNode SrcRC:$src)), _.ImmAllZerosV),
+             (!cast<Instruction>(Name#rkz) _.KRCWM:$mask,
+              (i32 (INSERT_SUBREG (i32 (IMPLICIT_DEF)), SrcRC:$src, Subreg)))>;
+}
+
+multiclass avx512_int_broadcastbw_reg_vl<bits<8> opc, string Name,
+                      AVX512VLVectorVTInfo _, SDPatternOperator OpNode,
+                      RegisterClass SrcRC, SubRegIndex Subreg, Predicate prd> {
+  let Predicates = [prd] in
+    defm Z : avx512_int_broadcastbw_reg<opc, Name#Z, _.info512, OpNode, SrcRC, 
+              Subreg>, EVEX_V512;
+  let Predicates = [prd, HasVLX] in {
+    defm Z256 : avx512_int_broadcastbw_reg<opc, Name#Z256, _.info256, OpNode,
+              SrcRC, Subreg>, EVEX_V256;
+    defm Z128 : avx512_int_broadcastbw_reg<opc, Name#Z128, _.info128, OpNode,
+              SrcRC, Subreg>, EVEX_V128;
+  }
+}
+
 multiclass avx512_int_broadcast_reg_vl<bits<8> opc, AVX512VLVectorVTInfo _,
                                        SDPatternOperator OpNode,
                                        RegisterClass SrcRC, Predicate prd> {
@@ -989,18 +1027,11 @@ multiclass avx512_int_broadcast_reg_vl<bits<8> opc, AV
   }
 }
 
-let isCodeGenOnly = 1 in {
-defm VPBROADCASTBr : avx512_int_broadcast_reg_vl<0x7A, avx512vl_i8_info,
-                                                 X86VBroadcast, GR8, HasBWI>;
-defm VPBROADCASTWr : avx512_int_broadcast_reg_vl<0x7B, avx512vl_i16_info,
-                                                 X86VBroadcast, GR16, HasBWI>;
-}
-let isAsmParserOnly = 1 in {
-  defm VPBROADCASTBr_Alt : avx512_int_broadcast_reg_vl<0x7A, avx512vl_i8_info,
-                                                       null_frag, GR32, HasBWI>;
-  defm VPBROADCASTWr_Alt : avx512_int_broadcast_reg_vl<0x7B, avx512vl_i16_info,
-                                                       null_frag, GR32, HasBWI>;
-}
+defm VPBROADCASTBr : avx512_int_broadcastbw_reg_vl<0x7A, "VPBROADCASTBr",
+                       avx512vl_i8_info, X86VBroadcast, GR8, sub_8bit, HasBWI>;
+defm VPBROADCASTWr : avx512_int_broadcastbw_reg_vl<0x7B, "VPBROADCASTWr",
+                       avx512vl_i16_info, X86VBroadcast, GR16, sub_16bit,
+                       HasBWI>;
 defm VPBROADCASTDr : avx512_int_broadcast_reg_vl<0x7C, avx512vl_i32_info,
                                                  X86VBroadcast, GR32, HasAVX512>;
 defm VPBROADCASTQr : avx512_int_broadcast_reg_vl<0x7C, avx512vl_i64_info,

Modified: head/contrib/llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
==============================================================================
--- head/contrib/llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp	Mon Aug 21 07:03:02 2017	(r322740)
@@ -60,11 +60,13 @@ std::vector<std::unique_ptr<MemoryBuffer>> OwningMBs;
 
 // Opens a file. Path has to be resolved already.
 // Newly created memory buffers are owned by this driver.
-MemoryBufferRef openFile(StringRef Path) {
+Optional<MemoryBufferRef> openFile(StringRef Path) {
   ErrorOr<std::unique_ptr<llvm::MemoryBuffer>> MB = MemoryBuffer::getFile(Path);
 
-  if (std::error_code EC = MB.getError())
+  if (std::error_code EC = MB.getError()) {
     llvm::errs() << "fail openFile: " << EC.message() << "\n";
+    return None;
+  }
 
   MemoryBufferRef MBRef = MB.get()->getMemBufferRef();
   OwningMBs.push_back(std::move(MB.get())); // take ownership
@@ -114,11 +116,16 @@ int llvm::dlltoolDriverMain(llvm::ArrayRef<const char 
   for (auto *Arg : Args.filtered(OPT_UNKNOWN))
     llvm::errs() << "ignoring unknown argument: " << Arg->getSpelling() << "\n";
 
-  MemoryBufferRef MB;
-  if (auto *Arg = Args.getLastArg(OPT_d))
-    MB = openFile(Arg->getValue());
+  if (!Args.hasArg(OPT_d)) {
+    llvm::errs() << "no definition file specified\n";
+    return 1;
+  }
 
-  if (!MB.getBufferSize()) {
+  Optional<MemoryBufferRef> MB = openFile(Args.getLastArg(OPT_d)->getValue());
+  if (!MB)
+    return 1;
+
+  if (!MB->getBufferSize()) {
     llvm::errs() << "definition file empty\n";
     return 1;
   }
@@ -133,7 +140,7 @@ int llvm::dlltoolDriverMain(llvm::ArrayRef<const char 
   }
 
   Expected<COFFModuleDefinition> Def =
-      parseCOFFModuleDefinition(MB, Machine, true);
+      parseCOFFModuleDefinition(*MB, Machine, true);
 
   if (!Def) {
     llvm::errs() << "error parsing definition\n"
@@ -154,7 +161,7 @@ int llvm::dlltoolDriverMain(llvm::ArrayRef<const char 
   if (Path.empty())
     Path = getImplibPath(Def->OutputFile);
 
-  if (writeImportLibrary(Def->OutputFile, Path, Def->Exports, Machine))
+  if (writeImportLibrary(Def->OutputFile, Path, Def->Exports, Machine, true))
     return 1;
   return 0;
 }

Modified: head/contrib/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
==============================================================================
--- head/contrib/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp	Mon Aug 21 07:03:02 2017	(r322740)
@@ -1470,6 +1470,7 @@ void DFSanVisitor::visitCallSite(CallSite CS) {
         }
 
         i = CS.arg_begin();
+        const unsigned ShadowArgStart = Args.size();
         for (unsigned n = FT->getNumParams(); n != 0; ++i, --n)
           Args.push_back(DFSF.getShadow(*i));
 
@@ -1504,6 +1505,15 @@ void DFSanVisitor::visitCallSite(CallSite CS) {
         CallInst *CustomCI = IRB.CreateCall(CustomF, Args);
         CustomCI->setCallingConv(CI->getCallingConv());
         CustomCI->setAttributes(CI->getAttributes());
+
+        // Update the parameter attributes of the custom call instruction to
+        // zero extend the shadow parameters. This is required for targets
+        // which consider ShadowTy an illegal type.
+        for (unsigned n = 0; n < FT->getNumParams(); n++) {
+          const unsigned ArgNo = ShadowArgStart + n;
+          if (CustomCI->getArgOperand(ArgNo)->getType() == DFSF.DFS.ShadowTy)
+            CustomCI->addParamAttr(ArgNo, Attribute::ZExt);
+        }
 
         if (!FT->getReturnType()->isVoidTy()) {
           LoadInst *LabelLoad = IRB.CreateLoad(DFSF.LabelReturnAlloca);

Modified: head/contrib/llvm/lib/Transforms/Scalar/BDCE.cpp
==============================================================================
--- head/contrib/llvm/lib/Transforms/Scalar/BDCE.cpp	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/lib/Transforms/Scalar/BDCE.cpp	Mon Aug 21 07:03:02 2017	(r322740)
@@ -15,6 +15,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Transforms/Scalar/BDCE.h"
+#include "llvm/ADT/SmallPtrSet.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/Analysis/DemandedBits.h"
@@ -35,6 +36,46 @@ using namespace llvm;
 STATISTIC(NumRemoved, "Number of instructions removed (unused)");
 STATISTIC(NumSimplified, "Number of instructions trivialized (dead bits)");
 
+/// If an instruction is trivialized (dead), then the chain of users of that
+/// instruction may need to be cleared of assumptions that can no longer be
+/// guaranteed correct.
+static void clearAssumptionsOfUsers(Instruction *I, DemandedBits &DB) {
+  assert(I->getType()->isIntegerTy() && "Trivializing a non-integer value?");
+
+  // Initialize the worklist with eligible direct users.
+  SmallVector<Instruction *, 16> WorkList;
+  for (User *JU : I->users()) {
+    // If all bits of a user are demanded, then we know that nothing below that
+    // in the def-use chain needs to be changed.
+    auto *J = dyn_cast<Instruction>(JU);
+    if (J && !DB.getDemandedBits(J).isAllOnesValue())
+      WorkList.push_back(J);
+  }
+
+  // DFS through subsequent users while tracking visits to avoid cycles.
+  SmallPtrSet<Instruction *, 16> Visited;
+  while (!WorkList.empty()) {
+    Instruction *J = WorkList.pop_back_val();
+
+    // NSW, NUW, and exact are based on operands that might have changed.
+    J->dropPoisonGeneratingFlags();
+
+    // We do not have to worry about llvm.assume or range metadata:
+    // 1. llvm.assume demands its operand, so trivializing can't change it.
+    // 2. range metadata only applies to memory accesses which demand all bits.
+
+    Visited.insert(J);
+
+    for (User *KU : J->users()) {
+      // If all bits of a user are demanded, then we know that nothing below
+      // that in the def-use chain needs to be changed.
+      auto *K = dyn_cast<Instruction>(KU);
+      if (K && !Visited.count(K) && !DB.getDemandedBits(K).isAllOnesValue())
+        WorkList.push_back(K);
+    }
+  }
+}
+
 static bool bitTrackingDCE(Function &F, DemandedBits &DB) {
   SmallVector<Instruction*, 128> Worklist;
   bool Changed = false;
@@ -51,6 +92,9 @@ static bool bitTrackingDCE(Function &F, DemandedBits &
       // replacing all uses with something else. Then, if they don't need to
       // remain live (because they have side effects, etc.) we can remove them.
       DEBUG(dbgs() << "BDCE: Trivializing: " << I << " (all bits dead)\n");
+
+      clearAssumptionsOfUsers(&I, DB);
+
       // FIXME: In theory we could substitute undef here instead of zero.
       // This should be reconsidered once we settle on the semantics of
       // undef, poison, etc.

Modified: head/contrib/llvm/tools/clang/include/clang-c/Index.h
==============================================================================
--- head/contrib/llvm/tools/clang/include/clang-c/Index.h	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/tools/clang/include/clang-c/Index.h	Mon Aug 21 07:03:02 2017	(r322740)
@@ -3206,6 +3206,8 @@ enum CXCallingConv {
   CXCallingConv_X86RegCall = 8,
   CXCallingConv_IntelOclBicc = 9,
   CXCallingConv_Win64 = 10,
+  /* Alias for compatibility with older versions of API. */
+  CXCallingConv_X86_64Win64 = CXCallingConv_Win64,
   CXCallingConv_X86_64SysV = 11,
   CXCallingConv_X86VectorCall = 12,
   CXCallingConv_Swift = 13,

Modified: head/contrib/llvm/tools/clang/include/clang/AST/Decl.h
==============================================================================
--- head/contrib/llvm/tools/clang/include/clang/AST/Decl.h	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/tools/clang/include/clang/AST/Decl.h	Mon Aug 21 07:03:02 2017	(r322740)
@@ -1666,8 +1666,7 @@ class FunctionDecl : public DeclaratorDecl, public Dec
   unsigned HasSkippedBody : 1;
 
   /// Indicates if the function declaration will have a body, once we're done
-  /// parsing it.  (We don't set it to false when we're done parsing, in the
-  /// hopes this is simpler.)
+  /// parsing it.
   unsigned WillHaveBody : 1;
 
   /// \brief End part of this FunctionDecl's source range.

Modified: head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticDriverKinds.td
==============================================================================
--- head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticDriverKinds.td	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticDriverKinds.td	Mon Aug 21 07:03:02 2017	(r322740)
@@ -138,9 +138,10 @@ def err_drv_cc_print_options_failure : Error<
 def err_drv_lto_without_lld : Error<"LTO requires -fuse-ld=lld">;
 def err_drv_preamble_format : Error<
     "incorrect format for -preamble-bytes=N,END">;
-def err_invalid_ios_deployment_target : Error<
+def warn_invalid_ios_deployment_target : Warning<
   "invalid iOS deployment version '%0', iOS 10 is the maximum deployment "
-  "target for 32-bit targets">;
+  "target for 32-bit targets">, InGroup<InvalidIOSDeploymentTarget>,
+  DefaultError;
 def err_drv_conflicting_deployment_targets : Error<
   "conflicting deployment targets, both '%0' and '%1' are present in environment">;
 def err_arc_unsupported_on_runtime : Error<

Modified: head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticGroups.td
==============================================================================
--- head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticGroups.td	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticGroups.td	Mon Aug 21 07:03:02 2017	(r322740)
@@ -151,9 +151,13 @@ def GNUFlexibleArrayUnionMember : DiagGroup<"gnu-flexi
 def GNUFoldingConstant : DiagGroup<"gnu-folding-constant">;
 def FormatExtraArgs : DiagGroup<"format-extra-args">;
 def FormatZeroLength : DiagGroup<"format-zero-length">;
-def CXX1zCompatMangling : DiagGroup<"c++1z-compat-mangling">;
+
+def InvalidIOSDeploymentTarget : DiagGroup<"invalid-ios-deployment-target">;
+
+def CXX17CompatMangling : DiagGroup<"c++17-compat-mangling">;
+def : DiagGroup<"c++1z-compat-mangling", [CXX17CompatMangling]>;
 // Name of this warning in GCC.
-def NoexceptType : DiagGroup<"noexcept-type", [CXX1zCompatMangling]>;
+def NoexceptType : DiagGroup<"noexcept-type", [CXX17CompatMangling]>;
 
 // Warnings for C++1y code which is not compatible with prior C++ standards.
 def CXXPre14Compat : DiagGroup<"c++98-c++11-compat">;
@@ -215,9 +219,10 @@ def CXX14Compat : DiagGroup<"c++14-compat", [CXXPre1zC
 def CXX14CompatPedantic : DiagGroup<"c++14-compat-pedantic",
                                     [CXXPre1zCompatPedantic]>;
 
-def CXX1zCompat : DiagGroup<"c++1z-compat", [DeprecatedRegister,
+def CXX17Compat : DiagGroup<"c++17-compat", [DeprecatedRegister,
                                              DeprecatedIncrementBool,
-                                             CXX1zCompatMangling]>;
+                                             CXX17CompatMangling]>;
+def : DiagGroup<"c++1z-compat", [CXX17Compat]>;
 
 def ExitTimeDestructors : DiagGroup<"exit-time-destructors">;
 def FlexibleArrayExtensions : DiagGroup<"flexible-array-extensions">;
@@ -769,10 +774,11 @@ def CXX14 : DiagGroup<"c++14-extensions", [CXX14Binary
 
 // A warning group for warnings about using C++1z features as extensions in
 // earlier C++ versions.
-def CXX1z : DiagGroup<"c++1z-extensions">;
+def CXX17 : DiagGroup<"c++17-extensions">;
 
 def : DiagGroup<"c++0x-extensions", [CXX11]>;
 def : DiagGroup<"c++1y-extensions", [CXX14]>;
+def : DiagGroup<"c++1z-extensions", [CXX17]>;
 
 def DelegatingCtorCycles :
   DiagGroup<"delegating-ctor-cycles">;

Modified: head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticLexKinds.td
==============================================================================
--- head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticLexKinds.td	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticLexKinds.td	Mon Aug 21 07:03:02 2017	(r322740)
@@ -181,10 +181,10 @@ def err_hex_constant_requires : Error<
 def ext_hex_constant_invalid : Extension<
   "hexadecimal floating constants are a C99 feature">, InGroup<C99>;
 def ext_hex_literal_invalid : Extension<
-  "hexadecimal floating literals are a C++1z feature">, InGroup<CXX1z>;
+  "hexadecimal floating literals are a C++17 feature">, InGroup<CXX17>;
 def warn_cxx1z_hex_literal : Warning<
   "hexadecimal floating literals are incompatible with "
-  "C++ standards before C++1z">,
+  "C++ standards before C++17">,
   InGroup<CXXPre1zCompatPedantic>, DefaultIgnore;
 def ext_binary_literal : Extension<
   "binary integer literals are a GNU extension">, InGroup<GNUBinaryLiteral>;
@@ -208,7 +208,7 @@ def warn_cxx98_compat_unicode_literal : Warning<
   "unicode literals are incompatible with C++98">,
   InGroup<CXX98Compat>, DefaultIgnore;
 def warn_cxx14_compat_u8_character_literal : Warning<
-  "unicode literals are incompatible with C++ standards before C++1z">,
+  "unicode literals are incompatible with C++ standards before C++17">,
   InGroup<CXXPre1zCompat>, DefaultIgnore;
 def warn_cxx11_compat_user_defined_literal : Warning<
   "identifier after literal will be treated as a user-defined literal suffix "

Modified: head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticParseKinds.td
==============================================================================
--- head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticParseKinds.td	Mon Aug 21 05:25:30 2017	(r322739)
+++ head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticParseKinds.td	Mon Aug 21 07:03:02 2017	(r322740)
@@ -211,10 +211,10 @@ def err_inline_namespace_alias : Error<"namespace alia
 def err_namespace_nonnamespace_scope : Error<
   "namespaces can only be defined in global or namespace scope">;
 def ext_nested_namespace_definition : ExtWarn<
-  "nested namespace definition is a C++1z extension; "
-  "define each namespace separately">, InGroup<CXX1z>;
+  "nested namespace definition is a C++17 extension; "
+  "define each namespace separately">, InGroup<CXX17>;
 def warn_cxx14_compat_nested_namespace_definition : Warning<
-  "nested namespace definition is incompatible with C++ standards before C++1z">,
+  "nested namespace definition is incompatible with C++ standards before C++17">,
   InGroup<CXXPre1zCompat>, DefaultIgnore;
 def err_inline_nested_namespace_definition : Error<
   "nested namespace definition cannot be 'inline'">;
@@ -358,7 +358,7 @@ def err_expected_coloncolon_after_super : Error<
   "expected '::' after '__super'">;
 
 def ext_decomp_decl_empty : ExtWarn<
-  "ISO C++1z does not allow a decomposition group to be empty">,
+  "ISO C++17 does not allow a decomposition group to be empty">,
   InGroup<DiagGroup<"empty-decomposition">>;
 
 /// Objective-C parser diagnostics
@@ -522,16 +522,16 @@ def err_function_is_not_record : Error<
 def err_super_in_using_declaration : Error<
   "'__super' cannot be used with a using declaration">;
 def ext_constexpr_if : ExtWarn<
-  "constexpr if is a C++1z extension">, InGroup<CXX1z>;
+  "constexpr if is a C++17 extension">, InGroup<CXX17>;
 def warn_cxx14_compat_constexpr_if : Warning<
-  "constexpr if is incompatible with C++ standards before C++1z">,
+  "constexpr if is incompatible with C++ standards before C++17">,
   DefaultIgnore, InGroup<CXXPre1zCompat>;
 def ext_init_statement : ExtWarn<
-  "'%select{if|switch}0' initialization statements are a C++1z extension">,
-  InGroup<CXX1z>;
+  "'%select{if|switch}0' initialization statements are a C++17 extension">,

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***



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