Date: Thu, 26 Feb 2004 02:09:11 +0100 From: "Willem Jan Withagen" <wjw@withagen.nl> To: <freebsd-amd64@freebsd.org> Subject: MSI K8T-MASTER Message-ID: <0aa001c3fc05$24d80a00$471b3dd4@dual>
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Hi, I might be about to order a MSI K8T MASTER FAR2. But the info page goes like: ==== On the K8T you can see the conductor paths of HyperTransport and V-Link With VIA's V-Map architecture makes bandwidths possible up to 1066 MB/s. The memory interface -- all four slots -- are directly connected to the first CPU socket. The second CPU accesses the memory through the HyperTransport of the first CPU. Theoretically eight slots (4 for each CPU like on the VIA K8W) would be possible but through the restrictions of the ATX form there is no room left for the additional four slots. The VIA K8T800 chipset is passively cooled, the VIA 8237 chip doesn't need any cooling. ==== Which does not really sound like the 2nd processor is going to be well connected to main memory??? And thus this sounds like an unbalanced architecture with respect to memory access times.... This this correct? or how does it work otherwise? --WjW
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