Date: Mon, 11 May 2026 11:31:31 +0000 From: "Sergey A. Osokin" <osa@freebsd.org> To: Brooks Davis <brooks@freebsd.org> Cc: ports-committers@freebsd.org, dev-commits-ports-all@freebsd.org, dev-commits-ports-main@freebsd.org Subject: Re: git: 4fc6c5e1c9a4 - main - devel/llvm??: Add Mips back to standard backends Message-ID: <agG-E2GSQ8zidXmJ@FreeBSD.org> In-Reply-To: <6a01a188.35c0a.25fb6e69@gitrepo.freebsd.org>
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Thank you, Brooks! I've recently discovered a build issue with devel/qt6-tools, hope this fix the issue. -- Sergey A. Osokin On Mon, May 11, 2026 at 09:29:44AM +0000, Brooks Davis wrote: > The branch main has been updated by brooks: > > URL: https://cgit.FreeBSD.org/ports/commit/?id=4fc6c5e1c9a43149a91c626c56ae6e33066449bc > > commit 4fc6c5e1c9a43149a91c626c56ae6e33066449bc > Author: Brooks Davis <brooks@FreeBSD.org> > AuthorDate: 2026-05-11 09:24:23 +0000 > Commit: Brooks Davis <brooks@FreeBSD.org> > CommitDate: 2026-05-11 09:29:31 +0000 > > devel/llvm??: Add Mips back to standard backends > > I'd forgotten that STANDARD_BACKENDS is includes _FREEBSD_BACKENDS so > Mips dropped out of the list when it was removed from _FREEBSD_BACKENDS. > > PR: 295111 > Fixes: 2a7c0561200c ("all: drop support for FreeBSD 13, mips and risc64sf") > --- > devel/llvm12/Makefile | 2 +- > devel/llvm13/Makefile | 2 +- > devel/llvm14/Makefile | 2 +- > devel/llvm15/Makefile | 2 +- > devel/llvm16/Makefile | 2 +- > devel/llvm17/Makefile | 2 +- > devel/llvm18/Makefile | 2 +- > devel/llvm19/Makefile | 2 +- > devel/llvm20/Makefile | 2 +- > devel/llvm21/Makefile | 2 +- > devel/llvm22/Makefile | 2 +- > 11 files changed, 11 insertions(+), 11 deletions(-) > > diff --git a/devel/llvm12/Makefile b/devel/llvm12/Makefile > index c8f1967fc61f..331820d69611 100644 > --- a/devel/llvm12/Makefile > +++ b/devel/llvm12/Makefile > @@ -289,7 +289,7 @@ FREEBSD_BACKENDS+= WebAssembly > NATIVE_BACKENDS+= WebAssembly > .endif > STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \ > - MSP430 NVPTX Sparc SystemZ WebAssembly XCore > + Mips MSP430 NVPTX Sparc SystemZ WebAssembly XCore > _BE_LIBS_COMMON= CodeGen Desc Info > _BE_LIBS_AArch64= AsmParser Disassembler Utils > _BE_LIBS_AMDGPU= AsmParser Disassembler Utils > diff --git a/devel/llvm13/Makefile b/devel/llvm13/Makefile > index d1a3c0c55525..198f7844a1e0 100644 > --- a/devel/llvm13/Makefile > +++ b/devel/llvm13/Makefile > @@ -326,7 +326,7 @@ FREEBSD_BACKENDS+= WebAssembly > NATIVE_BACKENDS+= WebAssembly > .endif > STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \ > - MSP430 NVPTX Sparc SystemZ WebAssembly XCore > + Mips MSP430 NVPTX Sparc SystemZ WebAssembly XCore > _BE_LIBS_COMMON= CodeGen Desc Info > _BE_LIBS_AArch64= AsmParser Disassembler Utils > _BE_LIBS_BACKWARDS_AArch64=Exegesis > diff --git a/devel/llvm14/Makefile b/devel/llvm14/Makefile > index 522d92bd405b..e50717040e7d 100644 > --- a/devel/llvm14/Makefile > +++ b/devel/llvm14/Makefile > @@ -327,7 +327,7 @@ FREEBSD_BACKENDS+= WebAssembly > NATIVE_BACKENDS+= WebAssembly > .endif > STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \ > - MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore > + Mips MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore > _BE_LIBS_COMMON= CodeGen Desc Info > _BE_LIBS_AArch64= AsmParser Disassembler Utils > _BE_LIBS_BACKWARDS_AArch64=Exegesis > diff --git a/devel/llvm15/Makefile b/devel/llvm15/Makefile > index b595942ba26b..541a19157b71 100644 > --- a/devel/llvm15/Makefile > +++ b/devel/llvm15/Makefile > @@ -349,7 +349,7 @@ FREEBSD_BACKENDS+= WebAssembly > NATIVE_BACKENDS+= WebAssembly > .endif > STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \ > - MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore > + Mips MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore > _BE_LIBS_COMMON= CodeGen Desc Info > _BE_LIBS_AArch64= AsmParser Disassembler Utils > _BE_LIBS_BACKWARDS_AArch64=Exegesis > diff --git a/devel/llvm16/Makefile b/devel/llvm16/Makefile > index 976bf428084e..3ca1b3b73f3e 100644 > --- a/devel/llvm16/Makefile > +++ b/devel/llvm16/Makefile > @@ -355,7 +355,7 @@ FREEBSD_BACKENDS+= WebAssembly > NATIVE_BACKENDS+= WebAssembly > .endif > STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \ > - LoongArch MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore > + LoongArch Mips MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore > _BE_LIBS_COMMON= CodeGen Desc Info > _BE_LIBS_AArch64= AsmParser Disassembler Utils > _BE_LIBS_BACKWARDS_AArch64=Exegesis > diff --git a/devel/llvm17/Makefile b/devel/llvm17/Makefile > index 7eb622bd2ece..d4362887356a 100644 > --- a/devel/llvm17/Makefile > +++ b/devel/llvm17/Makefile > @@ -359,7 +359,7 @@ FREEBSD_BACKENDS+= WebAssembly > NATIVE_BACKENDS+= WebAssembly > .endif > STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \ > - LoongArch MSP430 NVPTX SystemZ VE WebAssembly XCore > + LoongArch Mips MSP430 NVPTX SystemZ VE WebAssembly XCore > _BE_LIBS_COMMON= CodeGen Desc Info > _BE_INCS_AArch64= arm_sme_draft_spec_subject_to_change.h > _BE_LIBS_AArch64= AsmParser Disassembler Utils > diff --git a/devel/llvm18/Makefile b/devel/llvm18/Makefile > index b9297479f3d2..575f41258e95 100644 > --- a/devel/llvm18/Makefile > +++ b/devel/llvm18/Makefile > @@ -363,7 +363,7 @@ FREEBSD_BACKENDS+= WebAssembly > NATIVE_BACKENDS+= WebAssembly > .endif > STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \ > - LoongArch MSP430 NVPTX SystemZ VE WebAssembly XCore > + LoongArch Mips MSP430 NVPTX SystemZ VE WebAssembly XCore > _BE_LIBS_COMMON= CodeGen Desc Info > _BE_LIBS_AArch64= AsmParser Disassembler Utils > _BE_LIBS_BACKWARDS_AArch64=Exegesis > diff --git a/devel/llvm19/Makefile b/devel/llvm19/Makefile > index 554951f5e80a..6569c2461b73 100644 > --- a/devel/llvm19/Makefile > +++ b/devel/llvm19/Makefile > @@ -380,7 +380,7 @@ FREEBSD_BACKENDS+= WebAssembly > NATIVE_BACKENDS+= WebAssembly > .endif > STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \ > - LoongArch MSP430 NVPTX SystemZ VE WebAssembly XCore > + LoongArch Mips MSP430 NVPTX SystemZ VE WebAssembly XCore > _BE_LIBS_COMMON= CodeGen Desc Info > _BE_LIBS_AArch64= AsmParser Disassembler Utils > _BE_LIBS_BACKWARDS_AArch64=Exegesis > diff --git a/devel/llvm20/Makefile b/devel/llvm20/Makefile > index 1da9573d5eaf..55db4200109d 100644 > --- a/devel/llvm20/Makefile > +++ b/devel/llvm20/Makefile > @@ -386,7 +386,7 @@ FREEBSD_BACKENDS+= WebAssembly > NATIVE_BACKENDS+= WebAssembly > .endif > STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \ > - LoongArch MSP430 NVPTX SPIRV SystemZ VE WebAssembly \ > + LoongArch Mips MSP430 NVPTX SPIRV SystemZ VE WebAssembly \ > XCore > _BE_LIBS_COMMON= CodeGen Desc Info > _BE_LIBS_AArch64= AsmParser Disassembler Utils > diff --git a/devel/llvm21/Makefile b/devel/llvm21/Makefile > index 56e4c6daf9bc..059a310d813c 100644 > --- a/devel/llvm21/Makefile > +++ b/devel/llvm21/Makefile > @@ -386,7 +386,7 @@ FREEBSD_BACKENDS+= WebAssembly > NATIVE_BACKENDS+= WebAssembly > .endif > STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \ > - LoongArch MSP430 NVPTX SPIRV SystemZ VE WebAssembly \ > + LoongArch Mips MSP430 NVPTX SPIRV SystemZ VE WebAssembly \ > XCore > _BE_LIBS_COMMON= CodeGen Desc Info > _BE_LIBS_AArch64= AsmParser Disassembler Utils > diff --git a/devel/llvm22/Makefile b/devel/llvm22/Makefile > index 5f17ba53b170..66000ab91de4 100644 > --- a/devel/llvm22/Makefile > +++ b/devel/llvm22/Makefile > @@ -387,7 +387,7 @@ FREEBSD_BACKENDS+= WebAssembly > NATIVE_BACKENDS+= WebAssembly > .endif > STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \ > - LoongArch MSP430 NVPTX SPIRV SystemZ VE WebAssembly \ > + LoongArch Mips MSP430 NVPTX SPIRV SystemZ VE WebAssembly \ > XCore > _BE_LIBS_COMMON= CodeGen Desc Info > _BE_LIBS_AArch64= AsmParser Disassembler Utils >home | help
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