Date: Tue, 18 Mar 2003 22:55:37 -0800 (PST) From: Jake Burkholder <jake@FreeBSD.org> To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org Subject: cvs commit: src/sys/conf files.sparc64 src/sys/sparc64/include cache.h pmap.h smp.h src/sys/sparc64/sparc64 cache.c cheetah.c mp_exception.S spitfire.c Message-ID: <200303190655.h2J6tbPX014714@repoman.freebsd.org>
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jake 2003/03/18 22:55:37 PST
FreeBSD src repository
Modified files:
sys/conf files.sparc64
sys/sparc64/include cache.h pmap.h smp.h
sys/sparc64/sparc64 cache.c mp_exception.S
Added files:
sys/sparc64/sparc64 cheetah.c spitfire.c
Log:
- Remove unused cache flushing routines. These will not necessary work
on future UltraSPARC cpus for which the data cache is not direct mapped.
- Move UltraSPARC I and II (spitfire, blackbird, sapphire, sabre) specific
functions to spitfire.c, and add cheetah.c for UltraSPARC III specific
functions. Initially just cache flushing, but there are a few other
functions that will need to move here.
- Add an ipi handler for data cache flushing on UltraSPARC III.
- Use function pointers to select the right cache flushing functions based
on cpu_impl.
With this it is possible to boot single user from an mfs root on UltraSPARC
III systems, including spinning up secondary processors. There is currently
no support for the host to pci bridge, and no documentation for it is
publically available.
Thanks to Oleg Derevenetz for providing access to a system with UltraSPARC
III+ cpus.
Revision Changes Path
1.40 +2 -0 src/sys/conf/files.sparc64
1.7 +19 -57 src/sys/sparc64/include/cache.h
1.33 +1 -7 src/sys/sparc64/include/pmap.h
1.15 +10 -10 src/sys/sparc64/include/smp.h
1.15 +9 -376 src/sys/sparc64/sparc64/cache.c
1.1 +71 -0 src/sys/sparc64/sparc64/cheetah.c (new)
1.9 +39 -6 src/sys/sparc64/sparc64/mp_exception.S
1.1 +109 -0 src/sys/sparc64/sparc64/spitfire.c (new)
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