Date: Tue, 11 Mar 1997 17:17:45 +0100 (MET) From: Luigi Rizzo <luigi@labinfo.iet.unipi.it> To: dennis@etinc.com (dennis) Cc: msmith@atrad.adelaide.edu.au, hackers@freebsd.org Subject: Re: performance (was: 100 Mb/s cards) Message-ID: <199703111617.RAA00539@labinfo.iet.unipi.it> In-Reply-To: <3.0.32.19970311102342.00b05710@etinc.com> from "dennis" at Mar 11, 97 10:23:29 am
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> The comment implies that there is something "stupid" about the controllers > quad alignment requirement, but whoever wrote that should know that all > PCI bus master accesses MUST be quad aligned as a basic requirement > of the spec. Pardon me, but you can still write arbitrary bytes of a quadword by setting the proper byte enables. So there is nothing wrong -- in principle -- in specifying unaligned addresses for the receive buffers. Of course the hardware might be a little bit more complex, but that's another matter. Luigi -----------------------------+-------------------------------------- Luigi Rizzo | Dip. di Ingegneria dell'Informazione email: luigi@iet.unipi.it | Universita' di Pisa tel: +39-50-568533 | via Diotisalvi 2, 56126 PISA (Italy) fax: +39-50-568522 | http://www.iet.unipi.it/~luigi/ _____________________________|______________________________________
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