Date: Wed, 29 Aug 2012 21:12:19 +0000 (UTC) From: John Baldwin <jhb@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-9@freebsd.org Subject: svn commit: r239882 - in stable/9/sys/amd64: acpica amd64 include Message-ID: <201208292112.q7TLCJcH015293@svn.freebsd.org>
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Author: jhb Date: Wed Aug 29 21:12:19 2012 New Revision: 239882 URL: http://svn.freebsd.org/changeset/base/239882 Log: MFC 238142,238179: Now that our assembler supports the xsave family of instructions, use them natively rather than hand-assembled versions. For xgetbv/xsetbv, add a wrapper API to deal with xcr* registers: rxcr() and load_xcr(). Modified: stable/9/sys/amd64/acpica/acpi_switch.S stable/9/sys/amd64/amd64/cpu_switch.S stable/9/sys/amd64/amd64/fpu.c stable/9/sys/amd64/include/cpufunc.h Directory Properties: stable/9/sys/ (props changed) stable/9/sys/amd64/include/xen/ (props changed) stable/9/sys/boot/ (props changed) stable/9/sys/boot/i386/efi/ (props changed) stable/9/sys/boot/ia64/efi/ (props changed) stable/9/sys/boot/ia64/ski/ (props changed) stable/9/sys/boot/powerpc/boot1.chrp/ (props changed) stable/9/sys/boot/powerpc/ofw/ (props changed) stable/9/sys/cddl/contrib/opensolaris/ (props changed) stable/9/sys/conf/ (props changed) stable/9/sys/contrib/dev/acpica/ (props changed) stable/9/sys/contrib/octeon-sdk/ (props changed) stable/9/sys/contrib/pf/ (props changed) stable/9/sys/contrib/x86emu/ (props changed) stable/9/sys/dev/ (props changed) stable/9/sys/dev/e1000/ (props changed) stable/9/sys/dev/isp/ (props changed) stable/9/sys/dev/ixgbe/ (props changed) stable/9/sys/fs/ (props changed) stable/9/sys/fs/ntfs/ (props changed) stable/9/sys/modules/ (props changed) Modified: stable/9/sys/amd64/acpica/acpi_switch.S ============================================================================== --- stable/9/sys/amd64/acpica/acpi_switch.S Wed Aug 29 20:50:01 2012 (r239881) +++ stable/9/sys/amd64/acpica/acpi_switch.S Wed Aug 29 21:12:19 2012 (r239882) @@ -143,10 +143,8 @@ ENTRY(acpi_restorecpu) movq %rax, %rdx shrq $32, %rdx movl $XCR0, %ecx -/* xsetbv */ - .byte 0x0f, 0x01, 0xd1 -/* xrstor (%rbx) */ - .byte 0x0f, 0xae, 0x2b + xsetbv + xrstor (%rbx) jmp 2f 1: fxrstor (%rbx) Modified: stable/9/sys/amd64/amd64/cpu_switch.S ============================================================================== --- stable/9/sys/amd64/amd64/cpu_switch.S Wed Aug 29 20:50:01 2012 (r239881) +++ stable/9/sys/amd64/amd64/cpu_switch.S Wed Aug 29 21:12:19 2012 (r239882) @@ -122,8 +122,7 @@ done_store_dr: 1: movq %rdx,%rcx movl xsave_mask,%eax movl xsave_mask+4,%edx -/* xsave (%r8) */ - .byte 0x41,0x0f,0xae,0x20 + xsave (%r8) movq %rcx,%rdx 2: smsw %ax orb $CR0_TS,%al Modified: stable/9/sys/amd64/amd64/fpu.c ============================================================================== --- stable/9/sys/amd64/amd64/fpu.c Wed Aug 29 20:50:01 2012 (r239881) +++ stable/9/sys/amd64/amd64/fpu.c Wed Aug 29 21:12:19 2012 (r239882) @@ -85,9 +85,7 @@ xrstor(char *addr, uint64_t mask) low = mask; hi = mask >> 32; - /* xrstor (%rdi) */ - __asm __volatile(".byte 0x0f,0xae,0x2f" : : - "a" (low), "d" (hi), "D" (addr)); + __asm __volatile("xrstor %0" : : "m" (*addr), "a" (low), "d" (hi)); } static __inline void @@ -97,20 +95,8 @@ xsave(char *addr, uint64_t mask) low = mask; hi = mask >> 32; - /* xsave (%rdi) */ - __asm __volatile(".byte 0x0f,0xae,0x27" : : - "a" (low), "d" (hi), "D" (addr) : "memory"); -} - -static __inline void -xsetbv(uint32_t reg, uint64_t val) -{ - uint32_t low, hi; - - low = val; - hi = val >> 32; - __asm __volatile(".byte 0x0f,0x01,0xd1" : : - "c" (reg), "a" (low), "d" (hi)); + __asm __volatile("xsave %0" : "=m" (*addr) : "a" (low), "d" (hi) : + "memory"); } #else /* !(__GNUCLIKE_ASM && !lint) */ @@ -127,7 +113,6 @@ void start_emulating(void); void stop_emulating(void); void xrstor(char *addr, uint64_t mask); void xsave(char *addr, uint64_t mask); -void xsetbv(uint32_t reg, uint64_t val); #endif /* __GNUCLIKE_ASM && !lint */ @@ -238,7 +223,7 @@ fpuinit(void) if (use_xsave) { load_cr4(rcr4() | CR4_XSAVE); - xsetbv(XCR0, xsave_mask); + load_xcr(XCR0, xsave_mask); } /* Modified: stable/9/sys/amd64/include/cpufunc.h ============================================================================== --- stable/9/sys/amd64/include/cpufunc.h Wed Aug 29 20:50:01 2012 (r239881) +++ stable/9/sys/amd64/include/cpufunc.h Wed Aug 29 21:12:19 2012 (r239882) @@ -409,6 +409,25 @@ rcr4(void) return (data); } +static __inline u_long +rxcr(u_int reg) +{ + u_int low, high; + + __asm __volatile("xgetbv" : "=a" (low), "=d" (high) : "c" (reg)); + return (low | ((uint64_t)high << 32)); +} + +static __inline void +load_xcr(u_int reg, u_long val) +{ + u_int low, high; + + low = val; + high = val >> 32; + __asm __volatile("xsetbv" : : "c" (reg), "a" (low), "d" (high)); +} + /* * Global TLB flush (except for thise for pages marked PG_G) */
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