Date: Fri, 18 Nov 2005 22:45:11 GMT From: Eric Anholt <anholt@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 86943 for review Message-ID: <200511182245.jAIMjBxE042907@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=86943 Change 86943 by anholt@anholt_leguin on 2005/11/18 22:44:58 MF DRI CVS Affected files ... .. //depot/projects/drm-merge-vendor/sys/dev/drm/ati_pcigart.c#5 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/drmP.h#6 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/drm_agpsupport.c#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/drm_bufs.c#6 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/drm_drv.c#6 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/drm_memory.c#3 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/drm_pciids.h#5 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/drm_vm.c#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/i810_dma.c#1 add .. //depot/projects/drm-merge-vendor/sys/dev/drm/i810_drv.c#1 add .. //depot/projects/drm-merge-vendor/sys/dev/drm/i810_drv.h#1 add .. //depot/projects/drm-merge-vendor/sys/dev/drm/i915_dma.c#3 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/i915_drv.c#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/i915_drv.h#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/i915_mem.c#3 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/imagine_drv.h#1 add .. //depot/projects/drm-merge-vendor/sys/dev/drm/mach64_drv.c#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/mach64_drv.h#3 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/mach64_state.c#3 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/mga_dma.c#5 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/mga_drv.c#5 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/mga_drv.h#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/mga_state.c#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/r128_cce.c#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/r128_drv.c#5 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/r128_drv.h#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/r128_state.c#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/radeon_cp.c#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/radeon_drm.h#5 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/radeon_drv.c#5 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/radeon_drv.h#5 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/radeon_irq.c#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/radeon_state.c#5 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/savage_bci.c#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/savage_drv.c#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/savage_drv.h#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/savage_state.c#4 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/sis_drv.c#5 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/sis_drv.h#3 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/sis_mm.c#5 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/tdfx_drv.c#5 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/via_dma.c#2 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/via_drm.h#2 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/via_drv.c#2 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/via_drv.h#2 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/via_irq.c#2 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/via_map.c#2 edit .. //depot/projects/drm-merge-vendor/sys/dev/drm/via_mm.c#2 edit Differences ... ==== //depot/projects/drm-merge-vendor/sys/dev/drm/ati_pcigart.c#5 (text+ko) ==== @@ -35,32 +35,34 @@ #define ATI_MAX_PCIGART_PAGES 8192 /* 32 MB aperture, 4K pages */ #define ATI_PCIGART_TABLE_SIZE 32768 -int drm_ati_pcigart_init(drm_device_t *dev, unsigned long *addr, - dma_addr_t *bus_addr, int is_pcie) +int drm_ati_pcigart_init(drm_device_t *dev, drm_ati_pcigart_info *gart_info) { unsigned long pages; - u32 *pci_gart = 0, page_base; + u32 *pci_gart = NULL, page_base; int i, j; - *addr = 0; - *bus_addr = 0; - if (dev->sg == NULL) { DRM_ERROR( "no scatter/gather memory!\n" ); return 0; } - dev->sg->dmah = drm_pci_alloc(dev, ATI_PCIGART_TABLE_SIZE, 0, - 0xfffffffful); - if (dev->sg->dmah == NULL) { - DRM_ERROR("cannot allocate PCI GART table!\n"); - return 0; + if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) { + /* GART table in system memory */ + dev->sg->dmah = drm_pci_alloc(dev, ATI_PCIGART_TABLE_SIZE, 0, + 0xfffffffful); + if (dev->sg->dmah == NULL) { + DRM_ERROR("cannot allocate PCI GART table!\n"); + return 0; + } + + gart_info->addr = (void *)dev->sg->dmah->vaddr; + gart_info->bus_addr = dev->sg->dmah->busaddr; + pci_gart = (u32 *)dev->sg->dmah->vaddr; + } else { + /* GART table in framebuffer memory */ + pci_gart = gart_info->addr; } - - *addr = (long)dev->sg->dmah->vaddr; - *bus_addr = dev->sg->dmah->busaddr; - pci_gart = (u32 *)dev->sg->dmah->vaddr; - + pages = DRM_MIN(dev->sg->pages, ATI_MAX_PCIGART_PAGES); bzero(pci_gart, ATI_PCIGART_TABLE_SIZE); @@ -71,12 +73,9 @@ page_base = (u32) dev->sg->busaddr[i]; for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { - if (is_pcie) { - *pci_gart = (cpu_to_le32(page_base)>>8) | 0xc; - DRM_DEBUG("PCIE: %d %08X %08X to %p\n", i, - page_base, (cpu_to_le32(page_base)>>8)|0xc, - pci_gart); - } else + if (gart_info->is_pcie) + *pci_gart = (cpu_to_le32(page_base) >> 8) | 0xc; + else *pci_gart = cpu_to_le32(page_base); pci_gart++; page_base += ATI_PCIGART_PAGE_SIZE; @@ -88,8 +87,7 @@ return 1; } -int drm_ati_pcigart_cleanup(drm_device_t *dev, unsigned long addr, - dma_addr_t bus_addr) +int drm_ati_pcigart_cleanup(drm_device_t *dev, drm_ati_pcigart_info *gart_info) { if (dev->sg == NULL) { DRM_ERROR( "no scatter/gather memory!\n" ); ==== //depot/projects/drm-merge-vendor/sys/dev/drm/drmP.h#6 (text+ko) ==== @@ -448,11 +448,12 @@ char *name; } drm_pci_id_list_t; +#define DRM_AUTH 0x1 +#define DRM_MASTER 0x2 +#define DRM_ROOT_ONLY 0x4 typedef struct drm_ioctl_desc { int (*func)(DRM_IOCTL_ARGS); - int auth_needed; - int master; - int root_only; + int flags; } drm_ioctl_desc_t; typedef struct drm_magic_entry { @@ -621,6 +622,18 @@ int pid; } drm_vbl_sig_t; +/* location of GART table */ +#define DRM_ATI_GART_MAIN 1 +#define DRM_ATI_GART_FB 2 + +typedef struct ati_pcigart_info { + int gart_table_location; + int is_pcie; + void *addr; + dma_addr_t bus_addr; + drm_local_map_t mapping; +} drm_ati_pcigart_info; + struct drm_driver_info { int (*load)(struct drm_device *, unsigned long flags); int (*firstopen)(struct drm_device *); @@ -830,7 +843,7 @@ void *drm_ioremap(drm_device_t *dev, drm_local_map_t *map); void drm_ioremapfree(drm_local_map_t *map); int drm_mtrr_add(unsigned long offset, size_t size, int flags); -int drm_mtrr_del(unsigned long offset, size_t size, int flags); +int drm_mtrr_del(int handle, unsigned long offset, size_t size, int flags); int drm_context_switch(drm_device_t *dev, int old, int new); int drm_context_switch_complete(drm_device_t *dev, int new); @@ -867,6 +880,7 @@ void drm_dma_takedown(drm_device_t *dev); void drm_free_buffer(drm_device_t *dev, drm_buf_t *buf); void drm_reclaim_buffers(drm_device_t *dev, DRMFILE filp); +#define drm_core_reclaim_buffers drm_reclaim_buffers /* IRQ support (drm_irq.c) */ int drm_irq_install(drm_device_t *dev); @@ -882,7 +896,6 @@ int drm_device_is_agp(drm_device_t *dev); int drm_device_is_pcie(drm_device_t *dev); drm_agp_head_t *drm_agp_init(void); -void drm_agp_uninit(void); int drm_agp_acquire(drm_device_t *dev); int drm_agp_release(drm_device_t *dev); int drm_agp_info(drm_device_t * dev, drm_agp_info_t *info); @@ -891,10 +904,10 @@ int drm_agp_free_memory(void *handle); int drm_agp_bind_memory(void *handle, off_t start); int drm_agp_unbind_memory(void *handle); -#define drm_alloc_agp(dev, pages, type) drm_agp_allocate_memory(pages, type) -#define drm_free_agp(handle, pages) drm_agp_free_memory(handle) -#define drm_bind_agp(handle, start) drm_agp_bind_memory(handle, start) -#define drm_unbind_agp(handle) drm_agp_unbind_memory(handle) +int drm_agp_alloc(drm_device_t *dev, drm_agp_buffer_t *request); +int drm_agp_free(drm_device_t *dev, drm_agp_buffer_t *request); +int drm_agp_bind(drm_device_t *dev, drm_agp_binding_t *request); +int drm_agp_unbind(drm_device_t *dev, drm_agp_binding_t *request); /* Scatter Gather Support (drm_scatter.c) */ void drm_sg_cleanup(drm_sg_mem_t *entry); @@ -906,10 +919,10 @@ #endif /* __FreeBSD__ */ /* ATI PCIGART support (ati_pcigart.c) */ -int drm_ati_pcigart_init(drm_device_t *dev, unsigned long *addr, - dma_addr_t *bus_addr, int is_pcie); -int drm_ati_pcigart_cleanup(drm_device_t *dev, unsigned long addr, - dma_addr_t bus_addr); +int drm_ati_pcigart_init(drm_device_t *dev, + drm_ati_pcigart_info *gart_info); +int drm_ati_pcigart_cleanup(drm_device_t *dev, + drm_ati_pcigart_info *gart_info); /* Locking IOCTL support (drm_drv.c) */ int drm_lock(DRM_IOCTL_ARGS); @@ -966,10 +979,10 @@ int drm_agp_release_ioctl(DRM_IOCTL_ARGS); int drm_agp_enable_ioctl(DRM_IOCTL_ARGS); int drm_agp_info_ioctl(DRM_IOCTL_ARGS); -int drm_agp_alloc(DRM_IOCTL_ARGS); -int drm_agp_free(DRM_IOCTL_ARGS); -int drm_agp_unbind(DRM_IOCTL_ARGS); -int drm_agp_bind(DRM_IOCTL_ARGS); +int drm_agp_alloc_ioctl(DRM_IOCTL_ARGS); +int drm_agp_free_ioctl(DRM_IOCTL_ARGS); +int drm_agp_unbind_ioctl(DRM_IOCTL_ARGS); +int drm_agp_bind_ioctl(DRM_IOCTL_ARGS); /* Scatter Gather Support (drm_scatter.c) */ int drm_sg_alloc(DRM_IOCTL_ARGS); ==== //depot/projects/drm-merge-vendor/sys/dev/drm/drm_agpsupport.c#4 (text+ko) ==== @@ -194,10 +194,8 @@ return drm_agp_enable(dev, mode); } -int drm_agp_alloc(DRM_IOCTL_ARGS) +int drm_agp_alloc(drm_device_t *dev, drm_agp_buffer_t *request) { - DRM_DEVICE; - drm_agp_buffer_t request; drm_agp_mem_t *entry; void *handle; unsigned long pages; @@ -207,16 +205,17 @@ if (!dev->agp || !dev->agp->acquired) return EINVAL; - request = *(drm_agp_buffer_t *) data; - entry = malloc(sizeof(*entry), M_DRM, M_NOWAIT | M_ZERO); if (entry == NULL) return ENOMEM; - pages = (request.size + PAGE_SIZE - 1) / PAGE_SIZE; - type = (u_int32_t) request.type; + pages = (request->size + PAGE_SIZE - 1) / PAGE_SIZE; + type = (u_int32_t) request->type; - if (!(handle = drm_agp_allocate_memory(pages, type))) { + DRM_UNLOCK(); + handle = drm_agp_allocate_memory(pages, type); + DRM_LOCK(); + if (handle == NULL) { free(entry, M_DRM); return ENOMEM; } @@ -232,12 +231,27 @@ agp_memory_info(dev->agp->agpdev, entry->handle, &info); - request.handle = (unsigned long) entry->handle; - request.physical = info.ami_physical; + request->handle = (unsigned long) entry->handle; + request->physical = info.ami_physical; + + return 0; +} + +int drm_agp_alloc_ioctl(DRM_IOCTL_ARGS) +{ + DRM_DEVICE; + drm_agp_buffer_t request; + int retcode; + + request = *(drm_agp_buffer_t *) data; + + DRM_LOCK(); + retcode = drm_agp_alloc(dev, &request); + DRM_UNLOCK(); *(drm_agp_buffer_t *) data = request; - return 0; + return retcode; } static drm_agp_mem_t * drm_agp_lookup_entry(drm_device_t *dev, void *handle) @@ -250,64 +264,94 @@ return NULL; } -int drm_agp_unbind(DRM_IOCTL_ARGS) +int drm_agp_unbind(drm_device_t *dev, drm_agp_binding_t *request) { - DRM_DEVICE; - drm_agp_binding_t request; drm_agp_mem_t *entry; int retcode; if (!dev->agp || !dev->agp->acquired) return EINVAL; - request = *(drm_agp_binding_t *) data; - if (!(entry = drm_agp_lookup_entry(dev, (void *)request.handle))) + + entry = drm_agp_lookup_entry(dev, (void *)request->handle); + if (entry == NULL || !entry->bound) return EINVAL; - if (!entry->bound) return EINVAL; + + DRM_UNLOCK(); retcode = drm_agp_unbind_memory(entry->handle); - if (!retcode) - { - entry->bound=0; - return 0; - } - else - return retcode; + DRM_LOCK(); + + if (retcode == 0) + entry->bound = 0; + + return retcode; } -int drm_agp_bind(DRM_IOCTL_ARGS) +int drm_agp_unbind_ioctl(DRM_IOCTL_ARGS) { DRM_DEVICE; drm_agp_binding_t request; + int retcode; + + request = *(drm_agp_binding_t *) data; + + DRM_LOCK(); + retcode = drm_agp_unbind(dev, &request); + DRM_UNLOCK(); + + return retcode; +} + +int drm_agp_bind(drm_device_t *dev, drm_agp_binding_t *request) +{ drm_agp_mem_t *entry; int retcode; int page; - DRM_DEBUG("agp_bind, page_size=%x\n", PAGE_SIZE); if (!dev->agp || !dev->agp->acquired) return EINVAL; - request = *(drm_agp_binding_t *) data; - if (!(entry = drm_agp_lookup_entry(dev, (void *)request.handle))) + + DRM_DEBUG("agp_bind, page_size=%x\n", PAGE_SIZE); + + entry = drm_agp_lookup_entry(dev, (void *)request->handle); + if (entry == NULL || entry->bound) return EINVAL; - if (entry->bound) return EINVAL; - page = (request.offset + PAGE_SIZE - 1) / PAGE_SIZE; - if ((retcode = drm_agp_bind_memory(entry->handle, page))) - return retcode; - entry->bound = dev->agp->base + (page << PAGE_SHIFT); - return 0; + + page = (request->offset + PAGE_SIZE - 1) / PAGE_SIZE; + + DRM_UNLOCK(); + retcode = drm_agp_bind_memory(entry->handle, page); + DRM_LOCK(); + if (retcode == 0) + entry->bound = dev->agp->base + (page << PAGE_SHIFT); + + return retcode; } -int drm_agp_free(DRM_IOCTL_ARGS) +int drm_agp_bind_ioctl(DRM_IOCTL_ARGS) { DRM_DEVICE; - drm_agp_buffer_t request; + drm_agp_binding_t request; + int retcode; + + request = *(drm_agp_binding_t *) data; + + DRM_LOCK(); + retcode = drm_agp_bind(dev, &request); + DRM_UNLOCK(); + + return retcode; +} + +int drm_agp_free(drm_device_t *dev, drm_agp_buffer_t *request) +{ drm_agp_mem_t *entry; if (!dev->agp || !dev->agp->acquired) return EINVAL; - request = *(drm_agp_buffer_t *) data; - if (!(entry = drm_agp_lookup_entry(dev, (void*)request.handle))) + + entry = drm_agp_lookup_entry(dev, (void*)request->handle); + if (entry == NULL) return EINVAL; - if (entry->bound) - drm_agp_unbind_memory(entry->handle); if (entry->prev) entry->prev->next = entry->next; @@ -315,9 +359,32 @@ dev->agp->memory = entry->next; if (entry->next) entry->next->prev = entry->prev; + + DRM_UNLOCK(); + if (entry->bound) + drm_agp_unbind_memory(entry->handle); drm_agp_free_memory(entry->handle); + DRM_LOCK(); + free(entry, M_DRM); + return 0; + +} + +int drm_agp_free_ioctl(DRM_IOCTL_ARGS) +{ + DRM_DEVICE; + drm_agp_buffer_t request; + int retcode; + + request = *(drm_agp_buffer_t *) data; + + DRM_LOCK(); + retcode = drm_agp_free(dev, &request); + DRM_UNLOCK(); + + return retcode; } drm_agp_head_t *drm_agp_init(void) @@ -346,12 +413,6 @@ return head; } -void drm_agp_uninit(void) -{ -/* FIXME: What goes here */ -} - - void *drm_agp_allocate_memory(size_t pages, u32 type) { device_t agpdev; ==== //depot/projects/drm-merge-vendor/sys/dev/drm/drm_bufs.c#6 (text+ko) ==== @@ -53,7 +53,7 @@ /* Allocation of PCI memory resources (framebuffer, registers, etc.) for * drm_get_resource_*. Note that they are not RF_ACTIVE, so there's no virtual - * address for accessing them. Cleaned up at lastclose. + * address for accessing them. Cleaned up at unload. */ static int drm_alloc_resource(drm_device_t *dev, int resource) { @@ -61,12 +61,17 @@ DRM_ERROR("Resource %d too large\n", resource); return 1; } - if (dev->pcir[resource] != NULL) + + DRM_UNLOCK(); + if (dev->pcir[resource] != NULL) { + DRM_LOCK(); return 0; + } dev->pcirid[resource] = PCIR_BAR(resource); dev->pcir[resource] = bus_alloc_resource_any(dev->device, SYS_RES_MEMORY, &dev->pcirid[resource], RF_SHAREABLE); + DRM_LOCK(); if (dev->pcir[resource] == NULL) { DRM_ERROR("Couldn't find resource 0x%x\n", resource); @@ -127,17 +132,17 @@ */ if (type == _DRM_REGISTERS || type == _DRM_FRAME_BUFFER || type == _DRM_SHM) { - DRM_LOCK(); TAILQ_FOREACH(map, &dev->maplist, link) { - if (map->type == type && - (map->offset == offset || map->type == _DRM_SHM)) { + if (map->type == type && (map->offset == offset || + (map->type == _DRM_SHM && + map->flags == _DRM_CONTAINS_LOCK))) { map->size = size; DRM_DEBUG("Found kernel map %d\n", type); goto done; } } - DRM_UNLOCK(); } + DRM_UNLOCK(); /* Allocate a new map structure, fill it in, and do any type-specific * initialization necessary. @@ -236,7 +241,6 @@ done: /* Jumped to, with lock held, when a kernel map is found. */ - DRM_UNLOCK(); DRM_DEBUG("Added map %d 0x%lx/0x%lx\n", map->type, map->offset, map->size); @@ -261,8 +265,10 @@ if (!DRM_SUSER(p) && request.type != _DRM_AGP) return DRM_ERR(EACCES); + DRM_LOCK(); err = drm_addmap(dev, request.offset, request.size, request.type, request.flags, &map); + DRM_UNLOCK(); if (err != 0) return err; @@ -296,7 +302,7 @@ if (map->mtrr) { int __unused retcode; - retcode = drm_mtrr_del(map->offset, map->size, + retcode = drm_mtrr_del(0, map->offset, map->size, DRM_MTRR_WC); DRM_DEBUG("mtrr_del = %d\n", retcode); } ==== //depot/projects/drm-merge-vendor/sys/dev/drm/drm_drv.c#6 (text+ko) ==== @@ -60,63 +60,63 @@ #endif /* __NetBSD__ || __OpenBSD__ */ static drm_ioctl_desc_t drm_ioctls[256] = { - [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { drm_version, 0, 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_by_busid, 0, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_MAP)] = { drm_getmap, 0, 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_CLIENT)] = { drm_getclient, 0, 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_STATS)] = { drm_getstats, 0, 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_SET_VERSION)] = { drm_setversion, 0, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { drm_version, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_by_busid, DRM_MASTER|DRM_ROOT_ONLY}, + [DRM_IOCTL_NR(DRM_IOCTL_GET_MAP)] = { drm_getmap, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_GET_CLIENT)] = { drm_getclient, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_GET_STATS)] = { drm_getstats, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_SET_VERSION)] = { drm_setversion, DRM_MASTER|DRM_ROOT_ONLY }, - [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_noop, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_noop, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, - [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap_ioctl, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_RM_MAP)] = { drm_rmmap_ioctl, 1, 0, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_RM_MAP)] = { drm_rmmap_ioctl, DRM_AUTH }, - [DRM_IOCTL_NR(DRM_IOCTL_SET_SAREA_CTX)] = { drm_setsareactx, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_SAREA_CTX)] = { drm_getsareactx, 1, 0, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_SET_SAREA_CTX)] = { drm_setsareactx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_GET_SAREA_CTX)] = { drm_getsareactx, DRM_AUTH }, - [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { drm_addctx, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { drm_rmctx, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { drm_modctx, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { drm_getctx, 1, 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { drm_switchctx, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { drm_newctx, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { drm_resctx, 1, 0, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { drm_addctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { drm_rmctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { drm_modctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { drm_getctx, DRM_AUTH }, + [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { drm_switchctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { drm_newctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { drm_resctx, DRM_AUTH }, - [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, - [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { drm_lock, 1, 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { drm_unlock, 1, 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_noop, 1, 0, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { drm_lock, DRM_AUTH }, + [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { drm_unlock, DRM_AUTH }, + [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_noop, DRM_AUTH }, - [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { drm_addbufs_ioctl, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { drm_markbufs, 1, 1, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { drm_infobufs, 1, 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { drm_mapbufs, 1, 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { drm_freebufs, 1, 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { drm_dma, 1, 0, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { drm_addbufs_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { drm_markbufs, DRM_AUTH|DRM_MASTER }, + [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { drm_infobufs, DRM_AUTH }, + [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { drm_mapbufs, DRM_AUTH }, + [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { drm_freebufs, DRM_AUTH }, + [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { drm_dma, DRM_AUTH }, - [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { drm_control, 1, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { drm_control, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { drm_agp_acquire_ioctl, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { drm_agp_release_ioctl, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { drm_agp_enable_ioctl, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { drm_agp_info_ioctl, 1, 0, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { drm_agp_alloc, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { drm_agp_acquire_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { drm_agp_release_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { drm_agp_enable_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { drm_agp_info_ioctl, DRM_AUTH }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { drm_agp_alloc_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, - [DRM_IOCTL_NR(DRM_IOCTL_SG_ALLOC)] = { drm_sg_alloc, 1, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_SG_FREE)] = { drm_sg_free, 1, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_SG_ALLOC)] = { drm_sg_alloc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, + [DRM_IOCTL_NR(DRM_IOCTL_SG_FREE)] = { drm_sg_free, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, - [DRM_IOCTL_NR(DRM_IOCTL_WAIT_VBLANK)] = { drm_wait_vblank, 0, 0, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_WAIT_VBLANK)] = { drm_wait_vblank, 0 }, }; #ifdef __FreeBSD__ @@ -474,13 +474,7 @@ TAILQ_FOREACH_SAFE(map, &dev->maplist, link, mapsave) { drm_rmmap(dev, map); } - for (i = 0; i < DRM_MAX_PCI_RESOURCE; i++) { - if (dev->pcir[i] == NULL) - continue; - bus_release_resource(dev->device, SYS_RES_MEMORY, - dev->pcirid[i], dev->pcir[i]); - dev->pcir[i] = NULL; - } + drm_dma_takedown(dev); if ( dev->lock.hw_lock ) { @@ -514,7 +508,9 @@ TAILQ_INIT(&dev->files); if (dev->driver.load != NULL) { + DRM_LOCK(); retcode = dev->driver.load(dev, dev->id_entry->driver_private); + DRM_UNLOCK(); if (retcode != 0) goto error; } @@ -568,6 +564,8 @@ static void drm_unload(drm_device_t *dev) { + int i; + DRM_DEBUG( "\n" ); #ifdef __FreeBSD__ @@ -580,7 +578,7 @@ if (dev->agp && dev->agp->mtrr) { int __unused retcode; - retcode = drm_mtrr_del(dev->agp->info.ai_aperture_base, + retcode = drm_mtrr_del(0, dev->agp->info.ai_aperture_base, dev->agp->info.ai_aperture_size, DRM_MTRR_WC); DRM_DEBUG("mtrr_del = %d", retcode); } @@ -589,8 +587,20 @@ drm_lastclose(dev); DRM_UNLOCK(); + /* Clean up PCI resources allocated by drm_bufs.c. We're not really + * worried about resource consumption while the DRM is inactive (between + * lastclose and firstopen or unload) because these aren't actually + * taking up KVA, just keeping the PCI resource allocated. + */ + for (i = 0; i < DRM_MAX_PCI_RESOURCE; i++) { + if (dev->pcir[i] == NULL) + continue; + bus_release_resource(dev->device, SYS_RES_MEMORY, + dev->pcirid[i], dev->pcir[i]); + dev->pcir[i] = NULL; + } + if ( dev->agp ) { - drm_agp_uninit(); free(dev->agp, M_DRM); dev->agp = NULL; } @@ -865,9 +875,9 @@ /* ioctl->master check should be against something in the filp set up * for the first opener, but it doesn't matter yet. */ - if ((ioctl->root_only && !DRM_SUSER(p)) || - (ioctl->auth_needed && !priv->authenticated) || - (ioctl->master && !priv->master)) + if (((ioctl->flags & DRM_ROOT_ONLY) && !DRM_SUSER(p)) || + ((ioctl->flags & DRM_AUTH) && !priv->authenticated) || + ((ioctl->flags & DRM_MASTER) && !priv->master)) return EACCES; if (is_driver_ioctl) ==== //depot/projects/drm-merge-vendor/sys/dev/drm/drm_memory.c#3 (text+ko) ==== @@ -113,7 +113,7 @@ } int -drm_mtrr_del(unsigned long offset, size_t size, int flags) +drm_mtrr_del(int __unused handle, unsigned long offset, size_t size, int flags) { int act; struct mem_range_desc mrdesc; ==== //depot/projects/drm-merge-vendor/sys/dev/drm/drm_pciids.h#5 (text+ko) ==== @@ -46,6 +46,7 @@ {0x1002, 0x4E50, CHIP_RV350|CHIP_IS_MOBILITY, "ATI Radeon RV300 Mobility 9600 M10"}, \ {0x1002, 0x4E51, CHIP_RV350|CHIP_IS_MOBILITY, "ATI Radeon RV350 Mobility 9600 M10 NQ"}, \ {0x1002, 0x4E54, CHIP_RV350|CHIP_IS_MOBILITY, "ATI Radeon FireGL T2 128"}, \ + {0x1002, 0x4E56, CHIP_RV350|CHIP_IS_MOBILITY, "ATI Radeon FireGL Mobility T2e"}, \ {0x1002, 0x5144, CHIP_R100|CHIP_SINGLE_CRTC, "ATI Radeon QD R100"}, \ {0x1002, 0x5145, CHIP_R100|CHIP_SINGLE_CRTC, "ATI Radeon QE R100"}, \ {0x1002, 0x5146, CHIP_R100|CHIP_SINGLE_CRTC, "ATI Radeon QF R100"}, \ @@ -69,6 +70,7 @@ {0x1002, 0x516B, CHIP_R200, "ATI Radeon Qk R200"}, \ {0x1002, 0x516C, CHIP_R200, "ATI Radeon Ql R200"}, \ {0x1002, 0x5460, CHIP_RV350, "ATI Radeon X300"}, \ + {0x1002, 0x554F, CHIP_R350, "ATI Radeon X800"}, \ {0x1002, 0x5834, CHIP_RS300|CHIP_IS_IGP, "ATI Radeon RS300 IGP"}, \ {0x1002, 0x5835, CHIP_RS300|CHIP_IS_IGP|CHIP_IS_MOBILITY, "ATI Radeon RS300 Mobility IGP"}, \ {0x1002, 0x5836, CHIP_RS300|CHIP_IS_IGP, "ATI Radeon RS300 IGP"}, \ @@ -82,10 +84,12 @@ {0x1002, 0x5969, CHIP_RV100, "ATI ES1000 RN50"}, \ {0x1002, 0x596A, CHIP_RV280, "ATI Radeon RV280 9200"}, \ {0x1002, 0x596B, CHIP_RV280, "ATI Radeon RV280 9200"}, \ + {0x1002, 0x5b60, CHIP_RV350, "ATI Radeon RV370 X300SE"}, \ {0x1002, 0x5c61, CHIP_RV280|CHIP_IS_MOBILITY, "ATI Radeon RV280 Mobility"}, \ {0x1002, 0x5c62, CHIP_RV280, "ATI Radeon RV280"}, \ {0x1002, 0x5c63, CHIP_RV280|CHIP_IS_MOBILITY, "ATI Radeon RV280 Mobility"}, \ {0x1002, 0x5c64, CHIP_RV280, "ATI Radeon RV280"}, \ + {0x1002, 0x5d4d, CHIP_R350, "ATI Radeon R480"}, \ {0, 0, 0, NULL} #define r128_PCI_IDS \ @@ -245,3 +249,184 @@ {0x105d, 0x493d, IMAGINE_T2R, "Ticket to Ride"}, \ {0x105d, 0x5348, IMAGINE_REV4, "Revolution IV"}, \ {0, 0, 0, NULL} + +#define nv_PCI_IDS \ + {0x10DE, 0x0020, NV04, "NVidia RIVA TNT"}, \ + {0x10DE, 0x0028, NV04, "NVidia RIVA TNT2"}, \ + {0x10DE, 0x002A, NV04, "NVidia Unknown TNT2"}, \ + {0x10DE, 0x002C, NV04, "NVidia Vanta"}, \ + {0x10DE, 0x0029, NV04, "NVidia RIVA TNT2 Ultra"}, \ + {0x10DE, 0x002D, NV04, "NVidia RIVA TNT2 Model 64"}, \ + {0x10DE, 0x00A0, NV04, "NVidia Aladdin TNT2"}, \ + {0x10DE, 0x0100, NV10, "NVidia GeForce 256"}, \ + {0x10DE, 0x0101, NV10, "NVidia GeForce DDR"}, \ + {0x10DE, 0x0103, NV10, "NVidia Quadro"}, \ + {0x10DE, 0x0110, NV10, "NVidia GeForce2 MX/MX 400"}, \ + {0x10DE, 0x0111, NV10, "NVidia GeForce2 MX 100/200"}, \ + {0x10DE, 0x0112, NV10, "NVidia GeForce2 Go"}, \ + {0x10DE, 0x0113, NV10, "NVidia Quadro2 MXR/EX/Go"}, \ + {0x10DE, 0x0150, NV10, "NVidia GeForce2 GTS"}, \ + {0x10DE, 0x0151, NV10, "NVidia GeForce2 Ti"}, \ + {0x10DE, 0x0152, NV10, "NVidia GeForce2 Ultra"}, \ + {0x10DE, 0x0153, NV10, "NVidia Quadro2 Pro"}, \ + {0x10DE, 0x0170, NV10, "NVidia GeForce4 MX 460"}, \ + {0x10DE, 0x0171, NV10, "NVidia GeForce4 MX 440"}, \ + {0x10DE, 0x0172, NV10, "NVidia GeForce4 MX 420"}, \ + {0x10DE, 0x0173, NV10, "NVidia GeForce4 MX 440-SE"}, \ + {0x10DE, 0x0174, NV10, "NVidia GeForce4 440 Go"}, \ + {0x10DE, 0x0175, NV10, "NVidia GeForce4 420 Go"}, \ + {0x10DE, 0x0176, NV10, "NVidia GeForce4 420 Go 32M"}, \ + {0x10DE, 0x0177, NV10, "NVidia GeForce4 460 Go"}, \ + {0x10DE, 0x0178, NV10, "NVidia Quadro4 550 XGL"}, \ + {0x10DE, 0x0179, NV10, "NVidia GeForce4"}, \ + {0x10DE, 0x017A, NV10, "NVidia Quadro4 NVS"}, \ + {0x10DE, 0x017C, NV10, "NVidia Quadro4 500 GoGL"}, \ + {0x10DE, 0x017D, NV10, "NVidia GeForce4 410 Go 16M"}, \ + {0x10DE, 0x0181, NV10, "NVidia GeForce4 MX 440 with AGP8X"}, \ + {0x10DE, 0x0182, NV10, "NVidia GeForce4 MX 440SE with AGP8X"}, \ + {0x10DE, 0x0183, NV10, "NVidia GeForce4 MX 420 with AGP8X"}, \ + {0x10DE, 0x0185, NV10, "NVidia GeForce4 MX 4000"}, \ + {0x10DE, 0x0186, NV10, "NVidia GeForce4 448 Go"}, \ + {0x10DE, 0x0187, NV10, "NVidia GeForce4 488 Go"}, \ + {0x10DE, 0x0188, NV10, "NVidia Quadro4 580 XGL"}, \ + {0x10DE, 0x0189, NV10, "NVidia GeForce4 MX with AGP8X (Mac)"}, \ + {0x10DE, 0x018A, NV10, "NVidia Quadro4 280 NVS"}, \ + {0x10DE, 0x018B, NV10, "NVidia Quadro4 380 XGL"}, \ + {0x10DE, 0x018C, NV10, "NVidia Quadro NVS 50 PCI"}, \ + {0x10DE, 0x018D, NV10, "NVidia GeForce4 448 Go"}, \ + {0x10DE, 0x01A0, NV10, "NVidia GeForce2 Integrated GPU"}, \ + {0x10DE, 0x01F0, NV10, "NVidia GeForce4 MX Integrated GPU"}, \ + {0x10DE, 0x0200, NV20, "NVidia GeForce3"}, \ + {0x10DE, 0x0201, NV20, "NVidia GeForce3 Ti 200"}, \ + {0x10DE, 0x0202, NV20, "NVidia GeForce3 Ti 500"}, \ + {0x10DE, 0x0203, NV20, "NVidia Quadro DCC"}, \ + {0x10DE, 0x0250, NV20, "NVidia GeForce4 Ti 4600"}, \ + {0x10DE, 0x0251, NV20, "NVidia GeForce4 Ti 4400"}, \ + {0x10DE, 0x0252, NV20, "NVidia 0x0252"}, \ + {0x10DE, 0x0253, NV20, "NVidia GeForce4 Ti 4200"}, \ + {0x10DE, 0x0258, NV20, "NVidia Quadro4 900 XGL"}, \ + {0x10DE, 0x0259, NV20, "NVidia Quadro4 750 XGL"}, \ + {0x10DE, 0x025B, NV20, "NVidia Quadro4 700 XGL"}, \ + {0x10DE, 0x0280, NV20, "NVidia GeForce4 Ti 4800"}, \ + {0x10DE, 0x0281, NV20, "NVidia GeForce4 Ti 4200 with AGP8X"}, \ + {0x10DE, 0x0282, NV20, "NVidia GeForce4 Ti 4800 SE"}, \ + {0x10DE, 0x0286, NV20, "NVidia GeForce4 4200 Go"}, \ + {0x10DE, 0x028C, NV20, "NVidia Quadro4 700 GoGL"}, \ + {0x10DE, 0x0288, NV20, "NVidia Quadro4 980 XGL"}, \ + {0x10DE, 0x0289, NV20, "NVidia Quadro4 780 XGL"}, \ + {0x10DE, 0x0301, NV30, "NVidia GeForce FX 5800 Ultra"}, \ + {0x10DE, 0x0302, NV30, "NVidia GeForce FX 5800"}, \ + {0x10DE, 0x0308, NV30, "NVidia Quadro FX 2000"}, \ + {0x10DE, 0x0309, NV30, "NVidia Quadro FX 1000"}, \ + {0x10DE, 0x0311, NV30, "NVidia GeForce FX 5600 Ultra"}, \ + {0x10DE, 0x0312, NV30, "NVidia GeForce FX 5600"}, \ + {0x10DE, 0x0313, NV30, "NVidia 0x0313"},}, \ + {0x10DE, 0x0314, NV30, "NVidia GeForce FX 5600SE"}, \ + {0x10DE, 0x0316, NV30, "NVidia 0x0316"}, \ + {0x10DE, 0x0317, NV30, "NVidia 0x0317"}, \ + {0x10DE, 0x031A, NV30, "NVidia GeForce FX Go5600"}, \ + {0x10DE, 0x031B, NV30, "NVidia GeForce FX Go5650"}, \ + {0x10DE, 0x031C, NV30, "NVidia Quadro FX Go700"}, \ + {0x10DE, 0x031D, NV30, "NVidia 0x031D"}, \ + {0x10DE, 0x031E, NV30, "NVidia 0x031E"}, \ + {0x10DE, 0x031F, NV30, "NVidia 0x031F"}, \ + {0x10DE, 0x0320, NV30, "NVidia GeForce FX 5200"}, \ + {0x10DE, 0x0321, NV30, "NVidia GeForce FX 5200 Ultra"}, \ + {0x10DE, 0x0322, NV30, "NVidia GeForce FX 5200"}, \ + {0x10DE, 0x0323, NV30, "NVidia GeForce FX 5200SE"}, \ + {0x10DE, 0x0324, NV30, "NVidia GeForce FX Go5200"}, \ + {0x10DE, 0x0325, NV30, "NVidia GeForce FX Go5250"}, \ + {0x10DE, 0x0326, NV30, "NVidia GeForce FX 5500"}, \ + {0x10DE, 0x0327, NV30, "NVidia GeForce FX 5100"}, \ + {0x10DE, 0x0328, NV30, "NVidia GeForce FX Go5200 32M/64M"}, \ + {0x10DE, 0x0329, NV30, "NVidia GeForce FX 5200 (Mac)"}, \ + {0x10DE, 0x032A, NV30, "NVidia Quadro NVS 280 PCI"}, \ + {0x10DE, 0x032B, NV30, "NVidia Quadro FX 500/600 PCI"}, \ + {0x10DE, 0x032C, NV30, "NVidia GeForce FX Go53xx Series"}, \ + {0x10DE, 0x032D, NV30, "NVidia GeForce FX Go5100"}, \ + {0x10DE, 0x032F, NV30, "NVidia 0x032F"}, \ + {0x10DE, 0x0330, NV30, "NVidia GeForce FX 5900 Ultra"}, \ + {0x10DE, 0x0331, NV30, "NVidia GeForce FX 5900"}, \ + {0x10DE, 0x0332, NV30, "NVidia GeForce FX 5900XT"}, \ + {0x10DE, 0x0333, NV30, "NVidia GeForce FX 5950 Ultra"}, \ + {0x10DE, 0x033F, NV30, "NVidia Quadro FX 700"}, \ + {0x10DE, 0x0334, NV30, "NVidia GeForce FX 5900ZT"}, \ + {0x10DE, 0x0338, NV30, "NVidia Quadro FX 3000"}, \ + {0x10DE, 0x0341, NV30, "NVidia GeForce FX 5700 Ultra"}, \ + {0x10DE, 0x0342, NV30, "NVidia GeForce FX 5700"}, \ + {0x10DE, 0x0343, NV30, "NVidia GeForce FX 5700LE"}, \ + {0x10DE, 0x0344, NV30, "NVidia GeForce FX 5700VE"}, \ + {0x10DE, 0x0345, NV30, "NVidia 0x0345"}, \ + {0x10DE, 0x0347, NV30, "NVidia GeForce FX Go5700"}, \ + {0x10DE, 0x0348, NV30, "NVidia GeForce FX Go5700"}, \ + {0x10DE, 0x0349, NV30, "NVidia 0x0349"}, \ + {0x10DE, 0x034B, NV30, "NVidia 0x034B"}, \ + {0x10DE, 0x034C, NV30, "NVidia Quadro FX Go1000"}, \ + {0x10DE, 0x034E, NV30, "NVidia Quadro FX 1100"}, \ + {0x10DE, 0x034F, NV30, "NVidia 0x034F"}, \ + {0x10DE, 0x0040, NV40, "NVidia GeForce 6800 Ultra"}, \ + {0x10DE, 0x0041, NV40, "NVidia GeForce 6800"}, \ + {0x10DE, 0x0042, NV40, "NVidia GeForce 6800 LE"}, \ + {0x10DE, 0x0043, NV40, "NVidia 0x0043"}, \ + {0x10DE, 0x0045, NV40, "NVidia GeForce 6800 GT"}, \ + {0x10DE, 0x0046, NV40, "NVidia GeForce 6800 GT"}, \ + {0x10DE, 0x0049, NV40, "NVidia 0x0049"}, \ + {0x10DE, 0x004E, NV40, "NVidia Quadro FX 4000"}, \ + {0x10DE, 0x00C0, NV40, "NVidia 0x00C0"}, \ + {0x10DE, 0x00C1, NV40, "NVidia GeForce 6800"}, \ + {0x10DE, 0x00C2, NV40, "NVidia GeForce 6800 LE"}, \ + {0x10DE, 0x00C8, NV40, "NVidia GeForce Go 6800"}, \ + {0x10DE, 0x00C9, NV40, "NVidia GeForce Go 6800 Ultra"}, \ + {0x10DE, 0x00CC, NV40, "NVidia Quadro FX Go1400"}, \ + {0x10DE, 0x00CD, NV40, "NVidia Quadro FX 3450/4000 SDI"}, \ + {0x10DE, 0x00CE, NV40, "NVidia Quadro FX 1400"}, \ + {0x10de, 0x00f0, NV40, "Nvidia GeForce 6600 GT"}, \ + {0x10de, 0x00f1, NV40, "Nvidia GeForce 6600 GT"}, \ + {0x10DE, 0x0140, NV40, "NVidia GeForce 6600 GT"}, \ + {0x10DE, 0x0141, NV40, "NVidia GeForce 6600"}, \ + {0x10DE, 0x0142, NV40, "NVidia GeForce 6600 LE"}, \ + {0x10DE, 0x0143, NV40, "NVidia 0x0143"}, \ + {0x10DE, 0x0144, NV40, "NVidia GeForce Go 6600"}, \ + {0x10DE, 0x0145, NV40, "NVidia GeForce 6610 XL"}, \ + {0x10DE, 0x0146, NV40, "NVidia GeForce Go 6600 TE/6200 TE"}, \ + {0x10DE, 0x0147, NV40, "NVidia GeForce 6700 XL"}, \ + {0x10DE, 0x0148, NV40, "NVidia GeForce Go 6600"}, \ + {0x10DE, 0x0149, NV40, "NVidia GeForce Go 6600 GT"}, \ + {0x10DE, 0x014B, NV40, "NVidia 0x014B"}, \ + {0x10DE, 0x014C, NV40, "NVidia 0x014C"}, \ + {0x10DE, 0x014D, NV40, "NVidia 0x014D"}, \ + {0x10DE, 0x014E, NV40, "NVidia Quadro FX 540"}, \ + {0x10DE, 0x014F, NV40, "NVidia GeForce 6200"}, \ + {0x10DE, 0x0160, NV40, "NVidia 0x0160"}, \ + {0x10DE, 0x0161, NV40, "NVidia GeForce 6200 TurboCache(TM)"}, \ + {0x10DE, 0x0162, NV40, "NVidia GeForce 6200SE TurboCache(TM)"}, \ + {0x10DE, 0x0163, NV40, "NVidia 0x0163"}, \ + {0x10DE, 0x0164, NV40, "NVidia GeForce Go 6200"}, \ + {0x10DE, 0x0165, NV40, "NVidia Quadro NVS 285"}, \ + {0x10DE, 0x0166, NV40, "NVidia GeForce Go 6400"}, \ + {0x10DE, 0x0167, NV40, "NVidia GeForce Go 6200"}, \ + {0x10DE, 0x0168, NV40, "NVidia GeForce Go 6400"}, \ + {0x10DE, 0x0169, NV40, "NVidia 0x0169"}, \ + {0x10DE, 0x016B, NV40, "NVidia 0x016B"}, \ + {0x10DE, 0x016C, NV40, "NVidia 0x016C"}, \ + {0x10DE, 0x016D, NV40, "NVidia 0x016D"}, \ + {0x10DE, 0x016E, NV40, "NVidia 0x016E"}, \ + {0x10DE, 0x0210, NV40, "NVidia 0x0210"}, \ + {0x10DE, 0x0211, NV40, "NVidia GeForce 6800"}, \ + {0x10DE, 0x0212, NV40, "NVidia GeForce 6800 LE"}, \ + {0x10DE, 0x0215, NV40, "NVidia GeForce 6800 GT"}, \ + {0x10DE, 0x0220, NV40, "NVidia 0x0220"}, \ + {0x10DE, 0x0221, NV40, "NVidia GeForce 6200"}, \ + {0x10DE, 0x0222, NV40, "NVidia 0x0222"}, \ + {0x10DE, 0x0228, NV40, "NVidia 0x0228"}, \ + {0x10DE, 0x0090, NV40, "NVidia 0x0090"}, \ + {0x10DE, 0x0091, NV40, "NVidia GeForce 7800 GTX"}, \ + {0x10DE, 0x0092, NV40, "NVidia 0x0092"}, \ + {0x10DE, 0x0093, NV40, "NVidia 0x0093"}, \ + {0x10DE, 0x0094, NV40, "NVidia 0x0094"}, \ + {0x10DE, 0x0098, NV40, "NVidia 0x0098"}, \ + {0x10DE, 0x0099, NV40, "NVidia GeForce Go 7800 GTX"}, \ + {0x10DE, 0x009C, NV40, "NVidia 0x009C"}, \ + {0x10DE, 0x009D, NV40, "NVidia Quadro FX 4500"}, \ + {0x10DE, 0x009E, NV40, "NVidia 0x009E"}, \ + {0, 0, 0, NULL} ==== //depot/projects/drm-merge-vendor/sys/dev/drm/drm_vm.c#4 (text+ko) ==== @@ -37,6 +37,11 @@ drm_local_map_t *map; drm_file_t *priv; drm_map_type_t type; +#ifdef __FreeBSD__ + vm_paddr_t phys; +#else + paddr_t phys; +#endif DRM_LOCK(); priv = drm_find_file_by_proc(dev, DRM_CURPROC); @@ -102,25 +107,25 @@ >>> TRUNCATED FOR MAIL (1000 lines) <<<
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