Skip site navigation (1)Skip section navigation (2)
Date:      Sat, 5 Jun 2010 16:25:25 +0000 (UTC)
From:      Nathan Whitehorn <nwhitehorn@FreeBSD.org>
To:        cvs-src-old@freebsd.org
Subject:   cvs commit: src/sys/dev/ata/chipsets ata-serverworks.c
Message-ID:  <201006051625.o55GPfCp098183@repoman.freebsd.org>

next in thread | raw e-mail | index | archive | help

nwhitehorn    2010-06-05 16:25:25 UTC

  FreeBSD src repository

  Modified files:
    sys/dev/ata/chipsets ata-serverworks.c 
  Log:
  SVN rev 208836 on 2010-06-05 16:25:25Z by nwhitehorn
  
  Partially revert r208162 while waiting for review on a more comprehensive
  fix. On Apple OpenPICs, the low/high bit of the interrupt sense is only
  respected for interrupt 0. We currently erroneously program all OpenPIC
  interrupts level high instead of level low by default, which only matters
  for some G5 systems where the SATA controllers use IRQ 0.
  
  This change is a quick fix that will be reverted once the effect of
  changing the default interrupt sense on embedded systems is known.
  
  MFC after:      3 days
  
  Revision  Changes    Path
  1.12      +7 -0      src/sys/dev/ata/chipsets/ata-serverworks.c



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201006051625.o55GPfCp098183>