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Date:      Mon, 7 Oct 2013 21:54:15 +0200
From:      Zbigniew Bodek <zbb@freebsd.org>
To:        freebsd-embedded@freebsd.org
Cc:        freebsd-arm@freebsd.org, freebsd-current@freebsd.org
Subject:   Changes to UART ns8250
Message-ID:  <CALF_Tx=AwVnr0d75-K-yu97iVgmTJC7aaABoix73zHD%2B5eKJnQ@mail.gmail.com>

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--001a11c366d052011d04e82c04a8
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Hello.

I would like to present a patch for ns8250 serial that I would like to
commit in the near future (if there are no objections).

The patch is fixing newest DesignWare UART with busy detection.
During frequency divisors configuration when UART is busy transferring or
receiving data, line control register manipulation will not take effect.
Therefore, we will not set divisor latch access bit and we will corrupt LCR
instead of configuring divisors.
It is necessary to wait until UART finishes all transfers to proceed with
the configuration.

This was detected on Armada XP as UART fails on this issue 100/100 attempts.
The patch was tested by kevlo@ and me and it works on our Armada XP - based
systems.

Please send your comment or remarks if there are any.

Best regards
Zbigniew Bodek

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