Date: Sun, 5 Jul 2015 20:16:52 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org Subject: svn commit: r285179 - stable/8/sys/dev/re Message-ID: <201507052016.t65KGqWm037633@repo.freebsd.org>
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Author: marius Date: Sun Jul 5 20:16:51 2015 New Revision: 285179 URL: https://svnweb.freebsd.org/changeset/base/285179 Log: MFC: r281337 Don't enable RX and TX before their initial configuration is done, i. e. after setting up interrupt moderation but before turning interrupts on. This matches what Realtek's r8168 Linux driver does as of version 8.039.00 and fixes problems with certain incarnations of certain MAC revisions like the interface requiring an extra up/down-cycle after boot to start working or DMA configuration not being adhered to. PR: 193743, 197535 Modified: stable/8/sys/dev/re/if_re.c Directory Properties: stable/8/sys/ (props changed) stable/8/sys/dev/ (props changed) stable/8/sys/dev/re/ (props changed) Modified: stable/8/sys/dev/re/if_re.c ============================================================================== --- stable/8/sys/dev/re/if_re.c Sun Jul 5 20:16:45 2015 (r285178) +++ stable/8/sys/dev/re/if_re.c Sun Jul 5 20:16:51 2015 (r285179) @@ -3109,11 +3109,6 @@ re_init_locked(struct rl_softc *sc) RL_ADDR_LO(sc->rl_ldata.rl_tx_list_addr)); /* - * Enable transmit and receive. - */ - CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB); - - /* * Set the initial TX configuration. */ if (sc->rl_testmode) { @@ -3139,6 +3134,11 @@ re_init_locked(struct rl_softc *sc) CSR_WRITE_2(sc, RL_INTRMOD, 0x5100); } + /* + * Enable transmit and receive. + */ + CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB | RL_CMD_RX_ENB); + #ifdef DEVICE_POLLING /* * Disable interrupts if we are polling. @@ -3162,10 +3162,6 @@ re_init_locked(struct rl_softc *sc) /* Start RX/TX process. */ CSR_WRITE_4(sc, RL_MISSEDPKT, 0); -#ifdef notdef - /* Enable receiver and transmitter. */ - CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB); -#endif /* * Initialize the timer interrupt register so that
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