Date: Sun, 3 Nov 2019 21:17:02 +0000 (UTC) From: Vladimir Kondratyev <wulf@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r354321 - head/sys/dev/ichiic Message-ID: <201911032117.xA3LH2nX078112@repo.freebsd.org>
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Author: wulf Date: Sun Nov 3 21:17:01 2019 New Revision: 354321 URL: https://svnweb.freebsd.org/changeset/base/354321 Log: [ig4] Enable additional registers support on Appolo Lake controllers To be inline with intel-lpss Linux driver Modified: head/sys/dev/ichiic/ig4_var.h Modified: head/sys/dev/ichiic/ig4_var.h ============================================================================== --- head/sys/dev/ichiic/ig4_var.h Sun Nov 3 21:16:06 2019 (r354320) +++ head/sys/dev/ichiic/ig4_var.h Sun Nov 3 21:17:01 2019 (r354321) @@ -46,7 +46,7 @@ enum ig4_vers { IG4_HASWELL, IG4_ATOM, IG4_SKYLAKE, IG4_APL, IG4_CANNONLAKE }; /* Controller has additional registers */ #define IG4_HAS_ADDREGS(vers) ((vers) == IG4_SKYLAKE || \ - (vers) == IG4_CANNONLAKE) + (vers) == IG4_APL || (vers) == IG4_CANNONLAKE) struct ig4_hw { uint32_t ic_clock_rate; /* MHz */
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