Date: Tue, 18 Feb 2014 17:58:48 -0800 From: Adrian Chadd <adrian@freebsd.org> To: Stacey Son <sson@freebsd.org> Cc: "freebsd-mips@freebsd.org" <freebsd-mips@freebsd.org> Subject: Re: [RFC] 16K page size for kernel thread stack (patch) Message-ID: <CAJ-VmomH5SdJersWfeJSfUtTqu=HzjCSiw7E3hchaZAW-rujfA@mail.gmail.com> In-Reply-To: <EB4E2278-6E09-4495-8A0D-025A3AB4E4C7@freebsd.org> References: <FAC31FA0-26B0-468E-826F-1A17ECA6DA65@FreeBSD.org> <CAJ-VmonLGOGChUohF7E3VBXFSohtAWPcADTxVo=8XreYosNu7A@mail.gmail.com> <EB4E2278-6E09-4495-8A0D-025A3AB4E4C7@freebsd.org>
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On 18 February 2014 12:47, Stacey Son <sson@freebsd.org> wrote: > > On Feb 18, 2014, at 2:25 PM, Adrian Chadd <adrian@freebsd.org> wrote: > >> Hi! >> >> On 18 February 2014 08:48, Stacey Son <sson@freebsd.org> wrote: >>> Hi all: >>> >>> For mips64 the current size of 8K is not enough for the kernel thread s= tack. For more information, see: >>> >>> http://www.freebsd.org/cgi/query-pr.cgi?pr=3D177876 >>> >>> The following patch increases the size of the kernel thread stack to 16= K by using a single 16K sized page. See the patch at: >>> >>> http://people.freebsd.org/~sson/mips/kstack/kstack_large_page.diff >> >> Cool! Thanks for that. >> >> I'm glad to see the supported pagesize enumeration code going into the >> kernel. What do you think about committing just that bit to begin >> with? > > Yes, it probes the supported pages sizes (or PageMasks) by writing all on= e's to the PageMask register and then reading it back as suggested in the M= IPS architecture manual. If an implementation doesn't support all the diff= erent page sizes then those bits should not stick. The various page sizes= that are supported are reported the same time the MMU information is print= ed. > > I store the PageMask probe result in cpuinfo. This way it is easy to che= ck to the make sure the page size that is needed is supported. > > Yes, it would be easy to check this in as a separate patch. Sweet. Well, let's do that so the next set of updates MIPS people do with their boards will print out the available page sizes. It'll be good to gather some info on that. >> This looks like it touches shared code between mips32 and mips64. I'll >> spin this up on a mips24k and mips74k (mips32r2) board soon to see if >> it boots fine. > > Yes, I have only tested this on an ERL and Qemu. > > Do any of your boards support the ULRI? (See my other patches.) The ER= L/Cavium Octeon CN5020 doesn't seem to support it. I don't think the mips24k/mips74k cores I have support ULRI. -a
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