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Date:      Fri, 2 Apr 2021 17:23:35 GMT
From:      Neel Chauhan <nc@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org
Subject:   git: ea96dcc6e233 - stable/13 - ichsmb: Add PCI IDs for Intel Comet Lake and Tiger Lake
Message-ID:  <202104021723.132HNZLk052200@gitrepo.freebsd.org>

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The branch stable/13 has been updated by nc (ports committer):

URL: https://cgit.FreeBSD.org/src/commit/?id=ea96dcc6e2333a33509ee318be7882fcbdb88ed4

commit ea96dcc6e2333a33509ee318be7882fcbdb88ed4
Author:     Neel Chauhan <nc@FreeBSD.org>
AuthorDate: 2021-03-27 21:08:34 +0000
Commit:     Neel Chauhan <nc@FreeBSD.org>
CommitDate: 2021-04-02 17:22:46 +0000

    ichsmb: Add PCI IDs for Intel Comet Lake and Tiger Lake
    
    Reviewed by:            manu
    Differential Revision:  https://reviews.freebsd.org/D27859
    MFC after:              2 weeks
    
    (cherry picked from commit a94d15af26b51cea480030b26c751c3550b1b4bb)
---
 sys/dev/ichsmb/ichsmb_pci.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/sys/dev/ichsmb/ichsmb_pci.c b/sys/dev/ichsmb/ichsmb_pci.c
index e0aa3bfdb383..ff4b287dd020 100644
--- a/sys/dev/ichsmb/ichsmb_pci.c
+++ b/sys/dev/ichsmb/ichsmb_pci.c
@@ -105,6 +105,10 @@ __FBSDID("$FreeBSD$");
 #define	ID_LEWISBURG2			0xa223
 #define	ID_KABYLAKE			0xa2a3
 #define	ID_CANNONLAKE			0xa323
+#define	ID_COMETLAKE			0x02a3
+#define	ID_COMETLAKE2			0x06a3
+#define	ID_TIGERLAKE			0xa0a3
+#define	ID_TIGERLAKE2			0x43a3
 
 static const struct pci_device_table ichsmb_devices[] = {
 	{ PCI_DEV(PCI_VENDOR_INTEL, ID_82801AA),
@@ -187,6 +191,14 @@ static const struct pci_device_table ichsmb_devices[] = {
 	  PCI_DESCR("Intel Kaby Lake SMBus controller") },
 	{ PCI_DEV(PCI_VENDOR_INTEL, ID_CANNONLAKE),
 	  PCI_DESCR("Intel Cannon Lake SMBus controller") },
+	{ PCI_DEV(PCI_VENDOR_INTEL, ID_COMETLAKE),
+	  PCI_DESCR("Intel Comet Lake SMBus controller") },
+	{ PCI_DEV(PCI_VENDOR_INTEL, ID_COMETLAKE2),
+	  PCI_DESCR("Intel Comet Lake SMBus controller") },
+	{ PCI_DEV(PCI_VENDOR_INTEL, ID_TIGERLAKE),
+	  PCI_DESCR("Intel Tiger Lake SMBus controller") },
+	{ PCI_DEV(PCI_VENDOR_INTEL, ID_TIGERLAKE2),
+	  PCI_DESCR("Intel Tiger Lake SMBus controller") },
 };
 
 /* Internal functions */



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