Date: Wed, 9 Dec 1998 20:14:51 -0800 (PST) From: "Justin T. Gibbs" <gibbs@FreeBSD.ORG> To: cvs-committers@FreeBSD.ORG, cvs-all@FreeBSD.ORG Subject: cvs commit: src/sys/dev/aic7xxx aic7xxx.c aic7xxx.h aic7xxx.reg aic7xxx.seq aicasm_gram.y Message-ID: <199812100414.UAA11709@freefall.freebsd.org>
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gibbs 1998/12/09 20:14:51 PST
Modified files:
sys/dev/aic7xxx aic7xxx.c aic7xxx.h aic7xxx.reg
aic7xxx.seq aicasm_gram.y
Log:
Revamp the way that exceptional message handling is performed so that it
is more robust and common code can be used for both the target and iniator
roles. The mechanism for tracking negotiation state has also been simplified.
Add support for sync/wide negotiation in target mode and fix many of
the target mode bugs running at higher speeds uncovered. Make a first
stab at getting all of the bus skew delays correct. Sync+Wide dataout
transfers still cause problems, but this may be an initiator problem.
Ensure that we exit BITBUCKET mode if the controller is restarted.
Add support for target mode only firmware downloads. This has been
tested on the aic7880, but should mean that we can perform target mode
on any aic7xxx controller. Mixed mode (initiator and target roles in
the same firmware load) is currently only supported on the aic7890, but
with optimization, may fit on chips with less instruction space.
Revision Changes Path
1.12 +896 -536 src/sys/dev/aic7xxx/aic7xxx.c
1.3 +15 -13 src/sys/dev/aic7xxx/aic7xxx.h
1.9 +24 -13 src/sys/dev/aic7xxx/aic7xxx.reg
1.81 +177 -96 src/sys/dev/aic7xxx/aic7xxx.seq
1.6 +3 -3 src/sys/dev/aic7xxx/aicasm_gram.y
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