Date: Fri, 05 Dec 2025 07:57:29 +0000 From: Yuri Victorovich <yuri@FreeBSD.org> To: ports-committers@FreeBSD.org, dev-commits-ports-all@FreeBSD.org, dev-commits-ports-main@FreeBSD.org Subject: git: b18270429f06 - main - cad/yosys: update 0.=?utf-8?Q?58 =E2=86=92 0?=.60 Message-ID: <69329069.27a8f.74ed70a1@gitrepo.freebsd.org>
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The branch main has been updated by yuri: URL: https://cgit.FreeBSD.org/ports/commit/?id=b18270429f067b8875148fb8f4c9b183dec73020 commit b18270429f067b8875148fb8f4c9b183dec73020 Author: Yuri Victorovich <yuri@FreeBSD.org> AuthorDate: 2025-12-05 07:56:52 +0000 Commit: Yuri Victorovich <yuri@FreeBSD.org> CommitDate: 2025-12-05 07:57:21 +0000 cad/yosys: update 0.58 → 0.60 Reported by: portscout --- cad/yosys/Makefile | 3 +- cad/yosys/distinfo | 6 ++-- cad/yosys/files/patch-passes_cmds_bugpoint.cc | 18 ------------ cad/yosys/pkg-plist | 41 +++++++++++++-------------- 4 files changed, 24 insertions(+), 44 deletions(-) diff --git a/cad/yosys/Makefile b/cad/yosys/Makefile index 54f6353321ee..c7e1e99e425d 100644 --- a/cad/yosys/Makefile +++ b/cad/yosys/Makefile @@ -1,6 +1,6 @@ PORTNAME= yosys DISTVERSIONPREFIX= v -DISTVERSION= 0.58 +DISTVERSION= 0.60 CATEGORIES= cad MAINTAINER= yuri@FreeBSD.org @@ -17,6 +17,7 @@ BUILD_DEPENDS= abc:cad/abc \ gawk:lang/gawk LIB_DEPENDS= libffi.so:devel/libffi RUN_DEPENDS= bash:shells/bash \ + vcd2fst:cad/gtkwave \ xdot:x11/py-xdot@${PY_FLAVOR} TEST_DEPENDS= iverilog:cad/iverilog diff --git a/cad/yosys/distinfo b/cad/yosys/distinfo index 38209db4e411..bbc6cf3c8283 100644 --- a/cad/yosys/distinfo +++ b/cad/yosys/distinfo @@ -1,3 +1,3 @@ -TIMESTAMP = 1760017745 -SHA256 (YosysHQ-yosys-v0.58_GH0.tar.gz) = e2b8cba71da7be9009175691dade2ee98072f542e456a92d53a4f1a1bad05bd5 -SIZE (YosysHQ-yosys-v0.58_GH0.tar.gz) = 3427401 +TIMESTAMP = 1764913388 +SHA256 (YosysHQ-yosys-v0.60_GH0.tar.gz) = 52066c539572dead0a7e11b21bebba6387486b50907c63bdcea70432d7065f19 +SIZE (YosysHQ-yosys-v0.60_GH0.tar.gz) = 3445462 diff --git a/cad/yosys/files/patch-passes_cmds_bugpoint.cc b/cad/yosys/files/patch-passes_cmds_bugpoint.cc deleted file mode 100644 index af6de092e41e..000000000000 --- a/cad/yosys/files/patch-passes_cmds_bugpoint.cc +++ /dev/null @@ -1,18 +0,0 @@ ---- passes/cmds/bugpoint.cc.orig 2025-09-21 18:06:28 UTC -+++ passes/cmds/bugpoint.cc -@@ -22,13 +22,14 @@ - - #if defined(_WIN32) - # include <csignal> -+#endif -+ - # define WIFEXITED(x) 1 - # define WIFSIGNALED(x) 0 - # define WIFSTOPPED(x) 0 - # define WEXITSTATUS(x) ((x) & 0xff) - # define WTERMSIG(x) SIGTERM - # define WSTOPSIG(x) 0 --#endif - - USING_YOSYS_NAMESPACE - using namespace RTLIL_BACKEND; diff --git a/cad/yosys/pkg-plist b/cad/yosys/pkg-plist index 213697c05be5..be75e1b4de0d 100644 --- a/cad/yosys/pkg-plist +++ b/cad/yosys/pkg-plist @@ -17,7 +17,6 @@ bin/yosys-witness %%DATADIR%%/anlogic/eagle_bb.v %%DATADIR%%/anlogic/lutrams.txt %%DATADIR%%/anlogic/lutrams_map.v -%%DATADIR%%/cells.lib %%DATADIR%%/choices/han-carlson.v %%DATADIR%%/choices/kogge-stone.v %%DATADIR%%/choices/sklansky.v @@ -30,18 +29,12 @@ bin/yosys-witness %%DATADIR%%/coolrunner2/tff_extract.v %%DATADIR%%/coolrunner2/xc2_dff.lib %%DATADIR%%/dff2ff.v -%%DATADIR%%/ecp5/arith_map.v -%%DATADIR%%/ecp5/brams.txt -%%DATADIR%%/ecp5/brams_map.v +%%DATADIR%%/ecp5/ccu2c_sim.vh %%DATADIR%%/ecp5/cells_bb.v %%DATADIR%%/ecp5/cells_ff.vh %%DATADIR%%/ecp5/cells_io.vh -%%DATADIR%%/ecp5/cells_map.v %%DATADIR%%/ecp5/cells_sim.v -%%DATADIR%%/ecp5/dsp_map.v -%%DATADIR%%/ecp5/latches_map.v -%%DATADIR%%/ecp5/lutrams.txt -%%DATADIR%%/ecp5/lutrams_map.v +%%DATADIR%%/ecp5/common_sim.vh %%DATADIR%%/efinix/arith_map.v %%DATADIR%%/efinix/brams.txt %%DATADIR%%/efinix/brams_map.v @@ -74,6 +67,7 @@ bin/yosys-witness %%DATADIR%%/gowin/arith_map.v %%DATADIR%%/gowin/brams.txt %%DATADIR%%/gowin/brams_map.v +%%DATADIR%%/gowin/brams_map_gw5a.v %%DATADIR%%/gowin/cells_map.v %%DATADIR%%/gowin/cells_sim.v %%DATADIR%%/gowin/cells_xtra_gw1n.v @@ -186,28 +180,40 @@ bin/yosys-witness %%DATADIR%%/intel_alm/cyclonev/cells_sim.v %%DATADIR%%/lattice/arith_map_ccu2c.v %%DATADIR%%/lattice/arith_map_ccu2d.v +%%DATADIR%%/lattice/arith_map_nexus.v %%DATADIR%%/lattice/brams_16kd.txt %%DATADIR%%/lattice/brams_8kc.txt %%DATADIR%%/lattice/brams_map_16kd.v %%DATADIR%%/lattice/brams_map_8kc.v +%%DATADIR%%/lattice/brams_map_nexus.v +%%DATADIR%%/lattice/brams_nexus.txt %%DATADIR%%/lattice/ccu2c_sim.vh %%DATADIR%%/lattice/ccu2d_sim.vh %%DATADIR%%/lattice/cells_bb_ecp5.v +%%DATADIR%%/lattice/cells_bb_nexus.v %%DATADIR%%/lattice/cells_bb_xo2.v %%DATADIR%%/lattice/cells_bb_xo3.v %%DATADIR%%/lattice/cells_bb_xo3d.v %%DATADIR%%/lattice/cells_ff.vh %%DATADIR%%/lattice/cells_io.vh -%%DATADIR%%/lattice/cells_map.v +%%DATADIR%%/lattice/cells_map_nexus.v +%%DATADIR%%/lattice/cells_map_trellis.v %%DATADIR%%/lattice/cells_sim_ecp5.v +%%DATADIR%%/lattice/cells_sim_nexus.v %%DATADIR%%/lattice/cells_sim_xo2.v %%DATADIR%%/lattice/cells_sim_xo3.v %%DATADIR%%/lattice/cells_sim_xo3d.v %%DATADIR%%/lattice/common_sim.vh %%DATADIR%%/lattice/dsp_map_18x18.v +%%DATADIR%%/lattice/dsp_map_nexus.v %%DATADIR%%/lattice/latches_map.v -%%DATADIR%%/lattice/lutrams.txt -%%DATADIR%%/lattice/lutrams_map.v +%%DATADIR%%/lattice/lrams_map_nexus.v +%%DATADIR%%/lattice/lrams_nexus.txt +%%DATADIR%%/lattice/lutrams_map_nexus.v +%%DATADIR%%/lattice/lutrams_map_trellis.v +%%DATADIR%%/lattice/lutrams_nexus.txt +%%DATADIR%%/lattice/lutrams_trellis.txt +%%DATADIR%%/lattice/parse_init.vh %%DATADIR%%/microchip/LSRAM.txt %%DATADIR%%/microchip/LSRAM_map.v %%DATADIR%%/microchip/arith_map.v @@ -244,18 +250,8 @@ bin/yosys-witness %%DATADIR%%/nanoxplore/rf_rams_map_m.v %%DATADIR%%/nanoxplore/rf_rams_map_u.v %%DATADIR%%/nanoxplore/rf_rams_u.txt -%%DATADIR%%/nexus/arith_map.v -%%DATADIR%%/nexus/brams.txt -%%DATADIR%%/nexus/brams_map.v -%%DATADIR%%/nexus/cells_map.v %%DATADIR%%/nexus/cells_sim.v %%DATADIR%%/nexus/cells_xtra.v -%%DATADIR%%/nexus/dsp_map.v -%%DATADIR%%/nexus/latches_map.v -%%DATADIR%%/nexus/lrams.txt -%%DATADIR%%/nexus/lrams_map.v -%%DATADIR%%/nexus/lutrams.txt -%%DATADIR%%/nexus/lutrams_map.v %%DATADIR%%/nexus/parse_init.vh %%DATADIR%%/pmux2mux.v %%DATADIR%%/python3/smtio.py @@ -283,6 +279,7 @@ bin/yosys-witness %%DATADIR%%/quicklogic/qlf_k6n10f/libmap_brams_map.v %%DATADIR%%/quicklogic/qlf_k6n10f/sram1024x18_mem.v %%DATADIR%%/quicklogic/qlf_k6n10f/ufifo_ctl.v +%%DATADIR%%/sdc/graph-stubs.sdc %%DATADIR%%/sf2/arith_map.v %%DATADIR%%/sf2/cells_map.v %%DATADIR%%/sf2/cells_sim.vhome | help
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