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Date:      Mon, 9 Mar 2009 07:33:35 +0000 (UTC)
From:      Robert Noland <rnoland@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r189558 - head/sys/dev/drm
Message-ID:  <200903090733.n297XZ32013181@svn.freebsd.org>

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Author: rnoland
Date: Mon Mar  9 07:33:35 2009
New Revision: 189558
URL: http://svn.freebsd.org/changeset/base/189558

Log:
  	-Make the PCI(E)/AGP calculations consistent
  	-Calculate the scratch address correctly
  
  MFC after:	10 days

Modified:
  head/sys/dev/drm/r600_cp.c

Modified: head/sys/dev/drm/r600_cp.c
==============================================================================
--- head/sys/dev/drm/r600_cp.c	Mon Mar  9 07:24:32 2009	(r189557)
+++ head/sys/dev/drm/r600_cp.c	Mon Mar  9 07:33:35 2009	(r189558)
@@ -1633,6 +1633,7 @@ static void r600_cp_init_ring_buffer(str
 				       struct drm_file *file_priv)
 {
 	u32 ring_start;
+	u64 rptr_addr;
 
 	if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770))
 		r700_gfx_init(dev, dev_priv);
@@ -1687,27 +1688,20 @@ static void r600_cp_init_ring_buffer(str
 
 #if __OS_HAS_AGP
 	if (dev_priv->flags & RADEON_IS_AGP) {
-		/* XXX */
-		RADEON_WRITE(R600_CP_RB_RPTR_ADDR,
-			     (dev_priv->ring_rptr->offset
-			     - dev->agp->base + dev_priv->gart_vm_start) >> 8);
-		RADEON_WRITE(R600_CP_RB_RPTR_ADDR_HI, 0);
+		rptr_addr = dev_priv->ring_rptr->offset
+			- dev->agp->base +
+			dev_priv->gart_vm_start;
 	} else
 #endif
 	{
-		struct drm_sg_mem *entry = dev->sg;
-		unsigned long tmp_ofs, page_ofs;
-
-		tmp_ofs = dev_priv->ring_rptr->offset -
-			  (unsigned long)dev->sg->virtual;
-		page_ofs = tmp_ofs >> PAGE_SHIFT;
-
-		RADEON_WRITE(R600_CP_RB_RPTR_ADDR, entry->busaddr[page_ofs] >> 8);
-		RADEON_WRITE(R600_CP_RB_RPTR_ADDR_HI, 0);
-		DRM_DEBUG("ring rptr: offset=0x%08lx handle=0x%08lx\n",
-			  (unsigned long)entry->busaddr[page_ofs],
-			  entry->handle + tmp_ofs);
-	}
+		rptr_addr = dev_priv->ring_rptr->offset
+			- ((unsigned long) dev->sg->virtual)
+			+ dev_priv->gart_vm_start;
+	}
+	RADEON_WRITE(R600_CP_RB_RPTR_ADDR,
+		     rptr_addr & 0xffffffff);
+	RADEON_WRITE(R600_CP_RB_RPTR_ADDR_HI,
+		     upper_32_bits(rptr_addr));
 
 #ifdef __BIG_ENDIAN
 	RADEON_WRITE(R600_CP_RB_CNTL,
@@ -1756,8 +1750,17 @@ static void r600_cp_init_ring_buffer(str
 	 * We simply put this behind the ring read pointer, this works
 	 * with PCI GART as well as (whatever kind of) AGP GART
 	 */
-	RADEON_WRITE(R600_SCRATCH_ADDR, ((RADEON_READ(R600_CP_RB_RPTR_ADDR) << 8)
-					 + R600_SCRATCH_REG_OFFSET) >> 8);
+	{
+		u64 scratch_addr;
+
+		scratch_addr = RADEON_READ(R600_CP_RB_RPTR_ADDR);
+		scratch_addr |= ((u64)RADEON_READ(R600_CP_RB_RPTR_ADDR_HI)) << 32;
+		scratch_addr += R600_SCRATCH_REG_OFFSET;
+		scratch_addr >>= 8;
+		scratch_addr &= 0xffffffff;
+
+		RADEON_WRITE(R600_SCRATCH_ADDR, (uint32_t)scratch_addr);
+	}
 
 	RADEON_WRITE(R600_SCRATCH_UMSK, 0x7);
 



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