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Date:      Tue, 13 May 2014 08:04:10 -0600
From:      Warner Losh <imp@bsdimp.com>
To:        Ian Lepore <ian@FreeBSD.org>
Cc:        freebsd-arm <freebsd-arm@FreeBSD.org>
Subject:   Re: Patch to make BBB properly boot from eMMC every time
Message-ID:  <D10C3A60-70CF-448F-A476-4D2513FC3384@bsdimp.com>
In-Reply-To: <1399987808.56626.2.camel@revolution.hippie.lan>
References:  <5371E1F3.6080002@hot.ee> <1399987808.56626.2.camel@revolution.hippie.lan>

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On May 13, 2014, at 7:30 AM, Ian Lepore <ian@FreeBSD.org> wrote:

> On Tue, 2014-05-13 at 12:12 +0300, Sulev-Madis Silber (ketas) wrote:
>> On my BBB, I need following patch to boot from eMMC 100% of cases.
>> Without that, device is detected with 1 / 4 bit bus (it's actually 8
>> bit) or not at all (then boot fails).
>>=20
>> Actually, that code looks like weird way to implement sleep(), or at
>> least it has such (side) effect.
>>=20
>> Actually ian@ made that patch, and was confused about results.
>>=20
>>=20
>> =
-------------------------------------------------------------------------
>> Index: sys/dev/mmc/mmc.c
>> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
>> --- sys/dev/mmc/mmc.c   (revision 264141)
>> +++ sys/dev/mmc/mmc.c   (working copy)
>> @@ -769,8 +769,10 @@ mmc_test_bus_width(struct mmc_softc *sc)
>>                data.data =3D p8;
>>                data.len =3D 8;
>>                data.flags =3D MMC_DATA_WRITE;
>> -               mmc_wait_for_cmd(sc, &cmd, 0);
>> -
>> +               err =3D mmc_wait_for_cmd(sc, &cmd, 0);
>> +               if (err !=3D 0)
>> +                       device_printf(sc->dev, "BUSTEST_W err %d\n", =
err);
>> +
>>                memset(&cmd, 0, sizeof(cmd));
>>                memset(&data, 0, sizeof(data));
>>                cmd.opcode =3D MMC_BUSTEST_R;
>> @@ -782,7 +784,12 @@ mmc_test_bus_width(struct mmc_softc *sc)
>>                data.len =3D 8;
>>                data.flags =3D MMC_DATA_READ;
>>                err =3D mmc_wait_for_cmd(sc, &cmd, 0);
>> -
>> +               if (err !=3D 0)
>> +                       device_printf(sc->dev, "BUSTEST_R err %d\n", =
err);
>> +
>> +               device_printf(sc->dev, "read %02x %02x %02x %02x %02x
>> %02x %02x %02x\n",
>> +                       buf[0], buf[1], buf[2], buf[3], buf[4], =
buf[5],
>> buf[6], buf[7]);
>> +
>>                mmcbr_set_bus_width(sc->dev, bus_width_1);
>>                mmcbr_update_ios(sc->dev);
>> =
-------------------------------------------------------------------------
>=20
> Confused about the cause of the results, yes.  I think the printf I =
had
> you add to help me figure out the problem just changed the timing of =
the
> retry to make it work on the second try, but I have no idea why.
>=20
> Does anybody else with a BBB see the device randomly boot up as 1 or 4
> or 8 bits, changing from one boot to the next?  The bits are reported =
in
> the mmcsd0 line:
>=20
> mmcsd0: 8GB <SDHC SA08G 0.4 SN 2630755555 MFG 10/2009 by 2 TM> at mmc0
> 50.0MHz/4bit/65535-block
>=20
> That's from a wandboard, but a BBB eMMC should always be 8 bits.

I=92m away from my BBB atm, but I=92ll test this when I get back=85

Warner

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