Date: Mon, 14 May 2007 01:34:38 GMT From: Robert Watson <rwatson@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 119811 for review Message-ID: <200705140134.l4E1YcjN032277@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=119811 Change 119811 by rwatson@rwatson_noisy on 2007/05/14 01:34:10 Integrate zcopybpf branch. Affected files ... .. //depot/projects/zcopybpf/src/sys/amd64/acpica/madt.c#3 integrate .. //depot/projects/zcopybpf/src/sys/amd64/amd64/intr_machdep.c#4 integrate .. //depot/projects/zcopybpf/src/sys/amd64/amd64/io_apic.c#3 integrate .. //depot/projects/zcopybpf/src/sys/amd64/amd64/local_apic.c#4 integrate .. //depot/projects/zcopybpf/src/sys/amd64/amd64/mp_machdep.c#4 integrate .. //depot/projects/zcopybpf/src/sys/amd64/amd64/mptable.c#3 integrate .. //depot/projects/zcopybpf/src/sys/amd64/amd64/mptable_pci.c#2 integrate .. //depot/projects/zcopybpf/src/sys/amd64/amd64/msi.c#3 integrate .. //depot/projects/zcopybpf/src/sys/amd64/amd64/nexus.c#4 integrate .. //depot/projects/zcopybpf/src/sys/amd64/conf/GENERIC#4 integrate .. //depot/projects/zcopybpf/src/sys/amd64/conf/NOTES#3 integrate .. //depot/projects/zcopybpf/src/sys/amd64/include/apicvar.h#3 integrate .. //depot/projects/zcopybpf/src/sys/amd64/include/intr_machdep.h#4 integrate .. //depot/projects/zcopybpf/src/sys/amd64/include/vmparam.h#3 integrate .. //depot/projects/zcopybpf/src/sys/amd64/isa/atpic.c#2 integrate .. //depot/projects/zcopybpf/src/sys/amd64/linux32/linux32_machdep.c#5 integrate .. //depot/projects/zcopybpf/src/sys/amd64/pci/pci_bus.c#2 integrate .. //depot/projects/zcopybpf/src/sys/arm/include/vmparam.h#2 integrate .. //depot/projects/zcopybpf/src/sys/arm/xscale/i80321/ep80219_machdep.c#2 integrate .. //depot/projects/zcopybpf/src/sys/arm/xscale/i80321/iq31244_machdep.c#2 integrate .. //depot/projects/zcopybpf/src/sys/arm/xscale/ixp425/avila_machdep.c#3 integrate .. //depot/projects/zcopybpf/src/sys/boot/common/loader.8#3 integrate .. //depot/projects/zcopybpf/src/sys/compat/freebsd32/freebsd32_misc.c#2 integrate .. //depot/projects/zcopybpf/src/sys/compat/linprocfs/linprocfs.c#6 integrate .. //depot/projects/zcopybpf/src/sys/compat/opensolaris/kern/opensolaris_kobj.c#3 integrate .. //depot/projects/zcopybpf/src/sys/compat/opensolaris/kern/opensolaris_vfs.c#3 integrate .. //depot/projects/zcopybpf/src/sys/conf/Makefile.amd64#2 integrate .. //depot/projects/zcopybpf/src/sys/conf/Makefile.arm#2 integrate .. //depot/projects/zcopybpf/src/sys/conf/Makefile.i386#2 integrate .. //depot/projects/zcopybpf/src/sys/conf/Makefile.ia64#2 integrate .. //depot/projects/zcopybpf/src/sys/conf/Makefile.pc98#2 integrate .. //depot/projects/zcopybpf/src/sys/conf/Makefile.powerpc#2 integrate .. //depot/projects/zcopybpf/src/sys/conf/Makefile.sparc64#2 integrate .. //depot/projects/zcopybpf/src/sys/conf/Makefile.sun4v#2 integrate .. //depot/projects/zcopybpf/src/sys/conf/NOTES#7 integrate .. //depot/projects/zcopybpf/src/sys/conf/files#8 integrate .. //depot/projects/zcopybpf/src/sys/conf/kern.pre.mk#2 integrate .. //depot/projects/zcopybpf/src/sys/conf/options#6 integrate .. //depot/projects/zcopybpf/src/sys/contrib/opensolaris/uts/common/fs/gfs.c#2 integrate .. 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//depot/projects/zcopybpf/src/sys/contrib/opensolaris/uts/common/fs/zfs/zio.c#3 integrate .. //depot/projects/zcopybpf/src/sys/crypto/camellia/camellia-api.c#1 branch .. //depot/projects/zcopybpf/src/sys/crypto/camellia/camellia.c#1 branch .. //depot/projects/zcopybpf/src/sys/crypto/camellia/camellia.h#1 branch .. //depot/projects/zcopybpf/src/sys/dev/acpica/acpi.c#5 integrate .. //depot/projects/zcopybpf/src/sys/dev/acpica/acpi_pcib_acpi.c#2 integrate .. //depot/projects/zcopybpf/src/sys/dev/acpica/acpi_pcib_pci.c#2 integrate .. //depot/projects/zcopybpf/src/sys/dev/ata/ata-disk.c#4 integrate .. //depot/projects/zcopybpf/src/sys/dev/ata/atapi-cam.c#5 integrate .. //depot/projects/zcopybpf/src/sys/dev/bce/if_bce.c#5 integrate .. //depot/projects/zcopybpf/src/sys/dev/bce/if_bcefw.h#2 integrate .. //depot/projects/zcopybpf/src/sys/dev/bce/if_bcereg.h#2 integrate .. //depot/projects/zcopybpf/src/sys/dev/bge/if_bge.c#4 integrate .. //depot/projects/zcopybpf/src/sys/dev/bge/if_bgereg.h#4 integrate .. //depot/projects/zcopybpf/src/sys/dev/ciss/ciss.c#4 integrate .. //depot/projects/zcopybpf/src/sys/dev/ciss/cissvar.h#2 integrate .. //depot/projects/zcopybpf/src/sys/dev/em/LICENSE#2 integrate .. //depot/projects/zcopybpf/src/sys/dev/em/README#2 integrate .. //depot/projects/zcopybpf/src/sys/dev/em/e1000_80003es2lan.c#1 branch .. //depot/projects/zcopybpf/src/sys/dev/em/e1000_80003es2lan.h#1 branch .. //depot/projects/zcopybpf/src/sys/dev/em/e1000_82540.c#1 branch .. //depot/projects/zcopybpf/src/sys/dev/em/e1000_82541.c#1 branch .. //depot/projects/zcopybpf/src/sys/dev/em/e1000_82541.h#1 branch .. //depot/projects/zcopybpf/src/sys/dev/em/e1000_82542.c#1 branch .. //depot/projects/zcopybpf/src/sys/dev/em/e1000_82543.c#1 branch .. //depot/projects/zcopybpf/src/sys/dev/em/e1000_82543.h#1 branch .. //depot/projects/zcopybpf/src/sys/dev/em/e1000_82571.c#1 branch .. //depot/projects/zcopybpf/src/sys/dev/em/e1000_82571.h#1 branch .. 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@@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/amd64/acpica/madt.c,v 1.23 2007/03/22 18:16:38 jkim Exp $"); +__FBSDID("$FreeBSD: src/sys/amd64/acpica/madt.c,v 1.24 2007/05/08 22:01:02 jhb Exp $"); #include <sys/param.h> #include <sys/systm.h> @@ -53,21 +53,18 @@ #include <dev/acpica/acpivar.h> #include <dev/pci/pcivar.h> -#define NIOAPICS 32 /* Max number of I/O APICs */ -#define NLAPICS 32 /* Max number of local APICs */ - typedef void madt_entry_handler(ACPI_SUBTABLE_HEADER *entry, void *arg); /* These two arrays are indexed by APIC IDs. */ struct ioapic_info { void *io_apic; UINT32 io_vector; -} ioapics[NIOAPICS]; +} ioapics[MAX_APIC_ID + 1]; struct lapic_info { u_int la_enabled:1; u_int la_acpi_id:8; -} lapics[NLAPICS]; +} lapics[MAX_APIC_ID + 1]; static int madt_found_sci_override; static ACPI_TABLE_MADT *madt; @@ -393,7 +390,7 @@ } /* Third, we register all the I/O APIC's. */ - for (i = 0; i < NIOAPICS; i++) + for (i = 0; i <= MAX_APIC_ID; i++) if (ioapics[i].io_apic != NULL) ioapic_register(ioapics[i].io_apic); @@ -450,7 +447,7 @@ "enabled" : "disabled"); if (!(proc->LapicFlags & ACPI_MADT_ENABLED)) break; - if (proc->Id >= NLAPICS) + if (proc->Id > MAX_APIC_ID) panic("%s: CPU ID %u too high", __func__, proc->Id); la = &lapics[proc->Id]; KASSERT(la->la_enabled == 0, @@ -479,7 +476,7 @@ "MADT: Found IO APIC ID %u, Interrupt %u at %p\n", apic->Id, apic->GlobalIrqBase, (void *)(uintptr_t)apic->Address); - if (apic->Id >= NIOAPICS) + if (apic->Id > MAX_APIC_ID) panic("%s: I/O APIC ID %u too high", __func__, apic->Id); if (ioapics[apic->Id].io_apic != NULL) @@ -545,7 +542,7 @@ { int i; - for (i = 0; i < NLAPICS; i++) { + for (i = 0; i <= MAX_APIC_ID; i++) { if (!lapics[i].la_enabled) continue; if (lapics[i].la_acpi_id != acpi_id) @@ -566,7 +563,7 @@ int i, best; best = -1; - for (i = 0; i < NIOAPICS; i++) { + for (i = 0; i <= MAX_APIC_ID; i++) { if (ioapics[i].io_apic == NULL || ioapics[i].io_vector > intr) continue; ==== //depot/projects/zcopybpf/src/sys/amd64/amd64/intr_machdep.c#4 (text+ko) ==== @@ -26,7 +26,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $FreeBSD: src/sys/amd64/amd64/intr_machdep.c,v 1.30 2007/03/06 17:16:46 jhb Exp $ + * $FreeBSD: src/sys/amd64/amd64/intr_machdep.c,v 1.32 2007/05/08 21:29:12 jhb Exp $ */ /* @@ -43,13 +43,14 @@ #include <sys/param.h> #include <sys/bus.h> #include <sys/interrupt.h> -#include <sys/lock.h> #include <sys/ktr.h> #include <sys/kernel.h> +#include <sys/lock.h> #include <sys/mutex.h> #include <sys/proc.h> #include <sys/syslog.h> #include <sys/systm.h> +#include <sys/sx.h> #include <machine/clock.h> #include <machine/intr_machdep.h> #include <machine/smp.h> @@ -71,9 +72,16 @@ static int intrcnt_index; static struct intsrc *interrupt_sources[NUM_IO_INTS]; -static struct mtx intr_table_lock; +static struct sx intr_table_lock; +static struct mtx intrcnt_lock; static STAILQ_HEAD(, pic) pics; +#ifdef INTR_FILTER +static void intr_eoi_src(void *arg); +static void intr_disab_eoi_src(void *arg); +static void intr_event_stray(void *cookie); +#endif + #ifdef SMP static int assign_cpu; @@ -109,14 +117,14 @@ { int error; - mtx_lock_spin(&intr_table_lock); + sx_xlock(&intr_table_lock); if (intr_pic_registered(pic)) error = EBUSY; else { STAILQ_INSERT_TAIL(&pics, pic, pics); error = 0; } - mtx_unlock_spin(&intr_table_lock); + sx_xunlock(&intr_table_lock); return (error); } @@ -134,20 +142,26 @@ vector = isrc->is_pic->pic_vector(isrc); if (interrupt_sources[vector] != NULL) return (EEXIST); +#ifdef INTR_FILTER error = intr_event_create(&isrc->is_event, isrc, 0, + (mask_fn)isrc->is_pic->pic_enable_source, + intr_eoi_src, intr_disab_eoi_src, "irq%d:", vector); +#else + error = intr_event_create(&isrc->is_event, isrc, 0, (mask_fn)isrc->is_pic->pic_enable_source, "irq%d:", vector); +#endif if (error) return (error); - mtx_lock_spin(&intr_table_lock); + sx_xlock(&intr_table_lock); if (interrupt_sources[vector] != NULL) { - mtx_unlock_spin(&intr_table_lock); + sx_xunlock(&intr_table_lock); intr_event_destroy(isrc->is_event); return (EEXIST); } intrcnt_register(isrc); interrupt_sources[vector] = isrc; - isrc->is_enabled = 0; - mtx_unlock_spin(&intr_table_lock); + isrc->is_handlers = 0; + sx_xunlock(&intr_table_lock); return (0); } @@ -171,19 +185,18 @@ error = intr_event_add_handler(isrc->is_event, name, filter, handler, arg, intr_priority(flags), flags, cookiep); if (error == 0) { + sx_xlock(&intr_table_lock); intrcnt_updatename(isrc); - mtx_lock_spin(&intr_table_lock); - if (!isrc->is_enabled) { - isrc->is_enabled = 1; + isrc->is_handlers++; + if (isrc->is_handlers == 1) { #ifdef SMP if (assign_cpu) intr_assign_next_cpu(isrc); #endif - mtx_unlock_spin(&intr_table_lock); isrc->is_pic->pic_enable_intr(isrc); - } else - mtx_unlock_spin(&intr_table_lock); - isrc->is_pic->pic_enable_source(isrc); + isrc->is_pic->pic_enable_source(isrc); + } + sx_xunlock(&intr_table_lock); } return (error); } @@ -196,8 +209,16 @@ isrc = intr_handler_source(cookie); error = intr_event_remove_handler(cookie); - if (error == 0) + if (error == 0) { + sx_xlock(&intr_table_lock); + isrc->is_handlers--; + if (isrc->is_handlers == 0) { + isrc->is_pic->pic_disable_source(isrc, PIC_NO_EOI); + isrc->is_pic->pic_disable_intr(isrc); + } intrcnt_updatename(isrc); + sx_xunlock(&intr_table_lock); + } return (error); } @@ -212,11 +233,82 @@ return (isrc->is_pic->pic_config_intr(isrc, trig, pol)); } +#ifdef INTR_FILTER void intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame) { struct thread *td; struct intr_event *ie; + int vector; + + td = curthread; + + /* + * We count software interrupts when we process them. The + * code here follows previous practice, but there's an + * argument for counting hardware interrupts when they're + * processed too. + */ + (*isrc->is_count)++; + PCPU_LAZY_INC(cnt.v_intr); + + ie = isrc->is_event; + + /* + * XXX: We assume that IRQ 0 is only used for the ISA timer + * device (clk). + */ + vector = isrc->is_pic->pic_vector(isrc); + if (vector == 0) + clkintr_pending = 1; + + if (intr_event_handle(ie, frame) != 0) + intr_event_stray(isrc); +} + +static void +intr_event_stray(void *cookie) +{ + struct intsrc *isrc; + + isrc = cookie; + /* + * For stray interrupts, mask and EOI the source, bump the + * stray count, and log the condition. + */ + isrc->is_pic->pic_disable_source(isrc, PIC_EOI); + (*isrc->is_straycount)++; + if (*isrc->is_straycount < MAX_STRAY_LOG) + log(LOG_ERR, "stray irq%d\n", isrc->is_pic->pic_vector(isrc)); + else if (*isrc->is_straycount == MAX_STRAY_LOG) + log(LOG_CRIT, + "too many stray irq %d's: not logging anymore\n", + isrc->is_pic->pic_vector(isrc)); +} + +static void +intr_eoi_src(void *arg) +{ + struct intsrc *isrc; + + isrc = arg; + isrc->is_pic->pic_eoi_source(isrc); +} + +static void +intr_disab_eoi_src(void *arg) +{ + struct intsrc *isrc; + + isrc = arg; + isrc->is_pic->pic_disable_source(isrc, PIC_EOI); +} +#else +void +intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame) +{ + struct thread *td; + struct intr_event *ie; struct intr_handler *ih; int error, vector, thread; @@ -298,6 +390,7 @@ } td->td_intr_nesting_level--; } +#endif void intr_resume(void) @@ -307,12 +400,12 @@ #ifndef DEV_ATPIC atpic_reset(); #endif - mtx_lock_spin(&intr_table_lock); + sx_xlock(&intr_table_lock); STAILQ_FOREACH(pic, &pics, pics) { if (pic->pic_resume != NULL) pic->pic_resume(pic); } - mtx_unlock_spin(&intr_table_lock); + sx_xunlock(&intr_table_lock); } void @@ -320,12 +413,12 @@ { struct pic *pic; - mtx_lock_spin(&intr_table_lock); + sx_xlock(&intr_table_lock); STAILQ_FOREACH(pic, &pics, pics) { if (pic->pic_suspend != NULL) pic->pic_suspend(pic); } - mtx_unlock_spin(&intr_table_lock); + sx_xunlock(&intr_table_lock); } static void @@ -348,8 +441,8 @@ { char straystr[MAXCOMLEN + 1]; - /* mtx_assert(&intr_table_lock, MA_OWNED); */ KASSERT(is->is_event != NULL, ("%s: isrc with no event", __func__)); + mtx_lock_spin(&intrcnt_lock); is->is_index = intrcnt_index; intrcnt_index += 2; snprintf(straystr, MAXCOMLEN + 1, "stray irq%d", @@ -358,17 +451,18 @@ is->is_count = &intrcnt[is->is_index]; intrcnt_setname(straystr, is->is_index + 1); is->is_straycount = &intrcnt[is->is_index + 1]; + mtx_unlock_spin(&intrcnt_lock); } void intrcnt_add(const char *name, u_long **countp) { - mtx_lock_spin(&intr_table_lock); + mtx_lock_spin(&intrcnt_lock); *countp = &intrcnt[intrcnt_index]; intrcnt_setname(name, intrcnt_index); intrcnt_index++; - mtx_unlock_spin(&intr_table_lock); + mtx_unlock_spin(&intrcnt_lock); } static void @@ -378,7 +472,8 @@ intrcnt_setname("???", 0); intrcnt_index = 1; STAILQ_INIT(&pics); - mtx_init(&intr_table_lock, "intr table", NULL, MTX_SPIN); + sx_init(&intr_table_lock, "intr sources"); + mtx_init(&intrcnt_lock, "intrcnt", NULL, MTX_SPIN); } SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL) @@ -486,14 +581,14 @@ return; /* Round-robin assign a CPU to each enabled source. */ - mtx_lock_spin(&intr_table_lock); + sx_xlock(&intr_table_lock); assign_cpu = 1; for (i = 0; i < NUM_IO_INTS; i++) { isrc = interrupt_sources[i]; - if (isrc != NULL && isrc->is_enabled) + if (isrc != NULL && isrc->is_handlers > 0) intr_assign_next_cpu(isrc); } - mtx_unlock_spin(&intr_table_lock); + sx_xunlock(&intr_table_lock); } SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs, NULL) #endif ==== //depot/projects/zcopybpf/src/sys/amd64/amd64/io_apic.c#3 (text+ko) ==== @@ -28,7 +28,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/amd64/amd64/io_apic.c,v 1.29 2007/03/20 21:53:30 jhb Exp $"); +__FBSDID("$FreeBSD: src/sys/amd64/amd64/io_apic.c,v 1.30 2007/05/08 21:29:12 jhb Exp $"); #include "opt_isa.h" @@ -114,6 +114,7 @@ static void ioapic_disable_source(struct intsrc *isrc, int eoi); static void ioapic_eoi_source(struct intsrc *isrc); static void ioapic_enable_intr(struct intsrc *isrc); +static void ioapic_disable_intr(struct intsrc *isrc); static int ioapic_vector(struct intsrc *isrc); static int ioapic_source_pending(struct intsrc *isrc); static int ioapic_config_intr(struct intsrc *isrc, enum intr_trigger trig, @@ -125,8 +126,8 @@ static STAILQ_HEAD(,ioapic) ioapic_list = STAILQ_HEAD_INITIALIZER(ioapic_list); struct pic ioapic_template = { ioapic_enable_source, ioapic_disable_source, ioapic_eoi_source, ioapic_enable_intr, - ioapic_vector, ioapic_source_pending, - NULL, ioapic_resume, + ioapic_disable_intr, ioapic_vector, + ioapic_source_pending, NULL, ioapic_resume, ioapic_config_intr, ioapic_assign_cpu }; static int next_ioapic_base; @@ -359,6 +360,23 @@ } } +static void +ioapic_disable_intr(struct intsrc *isrc) +{ + struct ioapic_intsrc *intpin = (struct ioapic_intsrc *)isrc; + u_int vector; + + if (intpin->io_vector != 0) { + /* Mask this interrupt pin and free its APIC vector. */ + vector = intpin->io_vector; + apic_disable_vector(vector); + intpin->io_masked = 1; + intpin->io_vector = 0; + ioapic_program_intpin(intpin); + apic_free_vector(vector, intpin->io_irq); + } +} + static int ioapic_vector(struct intsrc *isrc) { ==== //depot/projects/zcopybpf/src/sys/amd64/amd64/local_apic.c#4 (text+ko) ==== @@ -32,7 +32,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/amd64/amd64/local_apic.c,v 1.38 2007/04/25 19:58:41 ariff Exp $"); +__FBSDID("$FreeBSD: src/sys/amd64/amd64/local_apic.c,v 1.40 2007/05/08 22:01:02 jhb Exp $"); #include "opt_hwpmc_hooks.h" @@ -65,13 +65,6 @@ #include <ddb/ddb.h> #endif -/* - * We can handle up to 60 APICs via our logical cluster IDs, but currently - * the physical IDs on Intel processors up to the Pentium 4 are limited to - * 16. - */ -#define MAX_APICID 16 - /* Sanity checks on IDT vectors. */ CTASSERT(APIC_IO_INTS + APIC_NUM_IOINTS == APIC_TIMER_INT); CTASSERT(APIC_TIMER_INT < APIC_LOCAL_INTS); @@ -114,7 +107,7 @@ u_long la_hard_ticks; u_long la_stat_ticks; u_long la_prof_ticks; -} static lapics[MAX_APICID]; +} static lapics[MAX_APIC_ID + 1]; /* XXX: should thermal be an NMI? */ @@ -147,6 +140,8 @@ APIC_TDCR_32, APIC_TDCR_64, APIC_TDCR_128 }; +extern inthand_t IDTVEC(rsvd); + volatile lapic_t *lapic; vm_paddr_t lapic_paddr; static u_long lapic_timer_divisor, lapic_timer_period, lapic_timer_hz; @@ -238,7 +233,7 @@ { int i; - if (apic_id >= MAX_APICID) { + if (apic_id > MAX_APIC_ID) { printf("APIC: Ignoring local APIC with ID %d\n", apic_id); if (boot_cpu) panic("Can't ignore BSP"); @@ -837,6 +832,16 @@ setidt(vector, ioint_handlers[vector / 32], SDT_SYSIGT, SEL_KPL, 0); } +void +apic_disable_vector(u_int vector) +{ + + KASSERT(vector != IDT_SYSCALL, ("Attempt to overwrite syscall entry")); + KASSERT(ioint_handlers[vector / 32] != NULL, + ("No ISR handler for vector %u", vector)); + setidt(vector, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); +} + /* Release an APIC vector when it's no longer in use. */ void apic_free_vector(u_int vector, u_int irq) ==== //depot/projects/zcopybpf/src/sys/amd64/amd64/mp_machdep.c#4 (text+ko) ==== @@ -25,7 +25,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/amd64/amd64/mp_machdep.c,v 1.283 2007/03/06 17:16:46 jhb Exp $"); +__FBSDID("$FreeBSD: src/sys/amd64/amd64/mp_machdep.c,v 1.284 2007/05/08 22:01:02 jhb Exp $"); #include "opt_cpu.h" #include "opt_kstack_pages.h" @@ -151,7 +151,7 @@ int cpu_present:1; int cpu_bsp:1; int cpu_disabled:1; -} static cpu_info[MAXCPU]; +} static cpu_info[MAX_APIC_ID + 1]; int cpu_apic_ids[MAXCPU]; /* Holds pending bitmap based IPIs per CPU */ @@ -159,6 +159,7 @@ static u_int boot_address; +static void assign_cpu_ids(void); static void set_interrupt_apic_ids(void); static int start_all_aps(void); static int start_ap(int apic_id); @@ -204,7 +205,7 @@ } group = &mp_groups[0]; groups = 1; - for (cpu = 0, apic_id = 0; apic_id < MAXCPU; apic_id++) { + for (cpu = 0, apic_id = 0; apic_id <= MAX_APIC_ID; apic_id++) { if (!cpu_info[apic_id].cpu_present) continue; /* @@ -246,9 +247,8 @@ cpu_add(u_int apic_id, char boot_cpu) { - if (apic_id >= MAXCPU) { - printf("SMP: CPU %d exceeds maximum CPU %d, ignoring\n", - apic_id, MAXCPU - 1); + if (apic_id > MAX_APIC_ID) { + panic("SMP: APIC ID %d too high", apic_id); return; } KASSERT(cpu_info[apic_id].cpu_present == 0, ("CPU %d added twice", @@ -261,13 +261,13 @@ boot_cpu_id = apic_id; cpu_info[apic_id].cpu_bsp = 1; } - mp_ncpus++; - if (apic_id > mp_maxid) - mp_maxid = apic_id; + if (mp_ncpus < MAXCPU) { + mp_ncpus++; + mp_maxid = mp_ncpus -1; + } if (bootverbose) printf("SMP: Added CPU %d (%s)\n", apic_id, boot_cpu ? "BSP" : "AP"); - } void @@ -286,8 +286,7 @@ else KASSERT(mp_maxid >= mp_ncpus - 1, ("%s: counters out of sync: max %d, count %d", __func__, - mp_maxid, mp_ncpus)); - + mp_maxid, mp_ncpus)); } >>> TRUNCATED FOR MAIL (1000 lines) <<<
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