Date: Thu, 5 Feb 2009 18:46:01 +0000 (UTC) From: Sam Leffler <sam@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r188166 - in projects/cambria/sys/arm: conf xscale/ixp425 Message-ID: <200902051846.n15Ik1GE034868@svn.freebsd.org>
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Author: sam Date: Thu Feb 5 18:46:01 2009 New Revision: 188166 URL: http://svn.freebsd.org/changeset/base/188166 Log: checkpoint support for optional GPS chip and RS485 port; not working Modified: projects/cambria/sys/arm/conf/CAMBRIA.hints projects/cambria/sys/arm/xscale/ixp425/avila_machdep.c projects/cambria/sys/arm/xscale/ixp425/ixp425.c projects/cambria/sys/arm/xscale/ixp425/ixp425reg.h Modified: projects/cambria/sys/arm/conf/CAMBRIA.hints ============================================================================== --- projects/cambria/sys/arm/conf/CAMBRIA.hints Thu Feb 5 18:45:08 2009 (r188165) +++ projects/cambria/sys/arm/conf/CAMBRIA.hints Thu Feb 5 18:46:01 2009 (r188166) @@ -13,6 +13,19 @@ hint.uart.0.ier_rxbits=0x5d # NB: need U # NB: no UART1 on ixp435 +# optional GPS serial port +#hint.uart.1.at="ixp0" +hint.uart.1.addr=0x53fc0000 +hint.uart.1.irq=20 +hint.uart.1.flags=0x10 +hint.uart.1.rclk=1843200 +# optional RS485 serial port +#hint.uart.2.at="ixp0" +#hint.uart.2.addr=0x53f80000 +#hint.uart.2.irq=21 +#hint.uart.2.flags=0x10 +#hint.uart.2.rclk=1843200 + # NPE Hardware Queue Manager hint.ixpqmgr.0.at="ixp0" Modified: projects/cambria/sys/arm/xscale/ixp425/avila_machdep.c ============================================================================== --- projects/cambria/sys/arm/xscale/ixp425/avila_machdep.c Thu Feb 5 18:45:08 2009 (r188165) +++ projects/cambria/sys/arm/xscale/ixp425/avila_machdep.c Thu Feb 5 18:46:01 2009 (r188166) @@ -244,6 +244,13 @@ static const struct pmap_devmap ixp435_d { IXP435_USB2_VBASE, IXP435_USB2_HWBASE, IXP435_USB2_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, }, + /* GPS Memory Space */ + { CAMBRIA_GPS_VBASE, CAMBRIA_GPS_HWBASE, CAMBRIA_GPS_SIZE, + VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, }, + /* RS485 Memory Space */ + { CAMBRIA_RS485_VBASE, CAMBRIA_RS485_HWBASE, CAMBRIA_RS485_SIZE, + VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, }, + { 0 } }; Modified: projects/cambria/sys/arm/xscale/ixp425/ixp425.c ============================================================================== --- projects/cambria/sys/arm/xscale/ixp425/ixp425.c Thu Feb 5 18:45:08 2009 (r188165) +++ projects/cambria/sys/arm/xscale/ixp425/ixp425.c Thu Feb 5 18:46:01 2009 (r188166) @@ -205,6 +205,7 @@ ixp425_attach(device_t dev) { struct ixp425_softc *sc; +bootverbose = 1; /*XXX*/ device_printf(dev, "%b\n", ixp4xx_read_feature_bits(), EXP_FCTRL_BITS); sc = device_get_softc(dev); @@ -337,6 +338,9 @@ static const struct { /* NB: need for ixp435 ehci controllers */ { IXP435_USB1_HWBASE, IXP435_USB1_SIZE, IXP435_USB1_VBASE }, { IXP435_USB2_HWBASE, IXP435_USB2_SIZE, IXP435_USB2_VBASE }, + /* NB: need for optional GPS on Cambria boards */ + { CAMBRIA_GPS_HWBASE, IXP425_REG_SIZE, CAMBRIA_GPS_VBASE }, + { CAMBRIA_RS485_HWBASE, IXP425_REG_SIZE, CAMBRIA_RS485_VBASE }, }; int @@ -393,7 +397,8 @@ ixp425_alloc_resource(device_t dev, devi flags, child); if (rv != NULL) { rman_set_rid(rv, *rid); - if (strcmp(device_get_name(child), "uart") == 0) + if (strcmp(device_get_name(child), "uart") == 0 +&& device_get_unit(child) == 0) /* XXX */ rman_set_bustag(rv, &ixp425_a4x_bs_tag); else rman_set_bustag(rv, sc->sc_iot); Modified: projects/cambria/sys/arm/xscale/ixp425/ixp425reg.h ============================================================================== --- projects/cambria/sys/arm/xscale/ixp425/ixp425reg.h Thu Feb 5 18:45:08 2009 (r188165) +++ projects/cambria/sys/arm/xscale/ixp425/ixp425reg.h Thu Feb 5 18:46:01 2009 (r188166) @@ -88,9 +88,11 @@ * SDRAM/DDR Memory Controller * F020 0000 --------------------------- IXP425_MCU_VBASE * + * F001 9000 RS485 (Cambria) + * F001 8000 GPS (Cambria) * F001 7000 EHCI USB 2 (IXP435) * F001 6000 EHCI USB 1 (IXP435) - * F020 6000 --------------------------- + * F001 6000 --------------------------- * Queue manager * F001 2000 --------------------------- IXP425_QMGR_VBASE * PCI Configuration and Status @@ -682,22 +684,24 @@ * IXP435/Gateworks Cambria */ #define CAMBRIA_GPS_HWBASE 0x53FC0000UL /* optional GPS Serial Port */ -#define CAMBRIA_GPS_SIZE 0x40000 +#define CAMBRIA_GPS_VBASE 0xF0018000UL +#define CAMBRIA_GPS_SIZE IXP425_REG_SIZE #define CAMBRIA_RS485_HWBASE 0x53F80000UL /* optional RS485 Serial Port */ -#define CAMBRIA_RS485_SIZE 0x40000 +#define CAMBRIA_RS485_VBASE 0xF0019000UL +#define CAMBRIA_RS485_SIZE IXP425_REG_SIZE #define CAMBRIA_OCTAL_LED_HWBASE 0x53F40000UL /* Octal Status LED Latch */ -#define CAMBRIA_OCTAL_LED_SIZE 0x1000 -#define CAMBRIA_CFSEL1_HWBASE 0x53E40000UL /* Compact Flash Socket Sel 0 */ +#define CAMBRIA_OCTAL_LED_SIZE IXP425_REG_SIZE +#define CAMBRIA_CFSEL1_HWBASE 0x53E40000UL /* Compact Flash Socket Sel 1 */ #define CAMBRIA_CFSEL1_SIZE 0x40000 -#define CAMBRIA_CFSEL0_HWBASE 0x53E00000UL /* Compact Flash Socket Sel 1 */ +#define CAMBRIA_CFSEL0_HWBASE 0x53E00000UL /* Compact Flash Socket Sel 0 */ #define CAMBRIA_CFSEL0_SIZE 0x40000 #define IXP435_USB1_HWBASE 0xcd000000UL /* USB host controller 1 */ #define IXP435_USB1_VBASE (IXP425_QMGR_VBASE + IXP425_QMGR_SIZE) -#define IXP435_USB1_SIZE 0x1000 /* NB: only uses 0x300 */ +#define IXP435_USB1_SIZE IXP425_REG_SIZE /* NB: only uses 0x300 */ #define IXP435_USB2_HWBASE 0xce000000UL /* USB host controller 2 */ #define IXP435_USB2_VBASE (IXP435_USB1_VBASE + IXP435_USB1_SIZE) -#define IXP435_USB2_SIZE 0x1000 /* NB: only uses 0x300 */ +#define IXP435_USB2_SIZE IXP425_REG_SIZE /* NB: only uses 0x300 */ #endif /* _IXP425REG_H_ */
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