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Date:      Tue, 25 Jun 2013 17:50:23 +0000 (UTC)
From:      David C Somayajulu <davidcs@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r252206 - in head: share/man/man4 sys/conf sys/dev/qlxge sys/modules sys/modules/qlxge
Message-ID:  <201306251750.r5PHoNxW091982@svn.freebsd.org>

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Author: davidcs
Date: Tue Jun 25 17:50:22 2013
New Revision: 252206
URL: http://svnweb.freebsd.org/changeset/base/252206

Log:
  Add Qlogic 10Gb Ethernet Driver for Qlogic 8100 Series CNA Adapter
  Driver version (v2.0.0)
  
  Submitted by: David C Somayajulu (davidcs@freebsd.org) QLogic Corporation
  Approved by: George Neville-Neil (gnn@freebsd.org)

Added:
  head/share/man/man4/qlxge.4   (contents, props changed)
  head/sys/dev/qlxge/
  head/sys/dev/qlxge/README.txt   (contents, props changed)
  head/sys/dev/qlxge/qls_dbg.c   (contents, props changed)
  head/sys/dev/qlxge/qls_dbg.h   (contents, props changed)
  head/sys/dev/qlxge/qls_def.h   (contents, props changed)
  head/sys/dev/qlxge/qls_dump.c   (contents, props changed)
  head/sys/dev/qlxge/qls_dump.h   (contents, props changed)
  head/sys/dev/qlxge/qls_glbl.h   (contents, props changed)
  head/sys/dev/qlxge/qls_hw.c   (contents, props changed)
  head/sys/dev/qlxge/qls_hw.h   (contents, props changed)
  head/sys/dev/qlxge/qls_inline.h   (contents, props changed)
  head/sys/dev/qlxge/qls_ioctl.c   (contents, props changed)
  head/sys/dev/qlxge/qls_ioctl.h   (contents, props changed)
  head/sys/dev/qlxge/qls_isr.c   (contents, props changed)
  head/sys/dev/qlxge/qls_os.c   (contents, props changed)
  head/sys/dev/qlxge/qls_os.h   (contents, props changed)
  head/sys/dev/qlxge/qls_ver.h   (contents, props changed)
  head/sys/modules/qlxge/
  head/sys/modules/qlxge/Makefile   (contents, props changed)
Modified:
  head/share/man/man4/Makefile
  head/sys/conf/files.amd64
  head/sys/modules/Makefile

Modified: head/share/man/man4/Makefile
==============================================================================
--- head/share/man/man4/Makefile	Tue Jun 25 15:45:31 2013	(r252205)
+++ head/share/man/man4/Makefile	Tue Jun 25 17:50:22 2013	(r252206)
@@ -371,6 +371,7 @@ MAN=	aac.4 \
 	pts.4 \
 	pty.4 \
 	puc.4 \
+	${_qlxge.4} \
 	${_qlxgb.4} \
 	${_qlxgbe.4} \
 	ral.4 \
@@ -793,10 +794,12 @@ _bhyve.4=	bhyve.4
 _if_ntb.4=	if_ntb.4
 _ntb.4=		ntb.4
 _ntb_hw.4=	ntb_hw.4
+_qlxge.4=	qlxge.4
 _qlxgb.4=	qlxgb.4
 _qlxgbe.4=	qlxgbe.4
 _sfxge.4=	sfxge.4
 
+MLINKS+=qlxge.4 if_qlxge.4
 MLINKS+=qlxgb.4 if_qlxgb.4
 MLINKS+=qlxgbe.4 if_qlxgbe.4
 MLINKS+=sfxge.4 if_sfxge.4

Added: head/share/man/man4/qlxge.4
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ head/share/man/man4/qlxge.4	Tue Jun 25 17:50:22 2013	(r252206)
@@ -0,0 +1,91 @@
+.\"-
+.\" Copyright (c) 2013-2014 Qlogic Corporation 
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+.\" SUCH DAMAGE.
+.\"
+.\" $FreeBSD$
+.\"
+.Dd June 21, 2013
+.Dt QLXGE 4
+.Os
+.Sh NAME
+.Nm qlxge
+.Nd "QLogic 8100 Series 10 Gigabit Ethernet Adapter Driver"
+.Sh SYNOPSIS
+To compile this driver into the kernel,
+place the following lines in your
+kernel configuration file:
+.Bd -ragged -offset indent
+.Cd "device qlxge"
+.Ed
+.Pp
+To load the driver as a
+module at boot time, place the following line in
+.Xr loader.conf 5 :
+.Bd -literal -offset indent
+if_qlxge_load="YES"
+.Ed
+.Sh DESCRIPTION
+The
+.Nm
+driver supports IPv4 checksum offload,
+TCP and UDP checksum offload for both IPv4 and IPv6,
+Large Segment Offload for both IPv4 and IPv6,
+Jumbo frames, VLAN Tag, and
+Receive Side scaling.
+For further hardware information, see
+.Pa http://www.qlogic.com/ .
+.Sh HARDWARE
+The
+.Nm
+driver supports 10 Gigabit Ethernet & CNA Adapter based on the following
+chipsets:
+.Pp
+.Bl -bullet -compact
+.It
+QLogic 8100 series
+.El
+.Sh SUPPORT
+For support questions please contact your QLogic approved reseller or
+QLogic Technical Support at
+.Pa http://support.qlogic.com ,
+or by E-mail at
+.Aq support@qlogic.com .
+.Sh SEE ALSO
+.Xr altq 4 ,
+.Xr arp 4 ,
+.Xr netintro 4 ,
+.Xr ng_ether 4 ,
+.Xr ifconfig 8
+.Sh HISTORY
+The
+.Nm
+device driver first appeared in
+.Fx 10.0 .
+.Sh AUTHORS
+.An -nosplit
+The
+.Nm
+driver was written by
+.An David C Somayajulu
+at QLogic Corporation.

Modified: head/sys/conf/files.amd64
==============================================================================
--- head/sys/conf/files.amd64	Tue Jun 25 15:45:31 2013	(r252205)
+++ head/sys/conf/files.amd64	Tue Jun 25 17:50:22 2013	(r252206)
@@ -227,6 +227,12 @@ dev/nvme/nvme_test.c		optional	nvme
 dev/nvram/nvram.c		optional	nvram isa
 dev/random/ivy.c		optional	random rdrand_rng
 dev/random/nehemiah.c		optional	random padlock_rng
+dev/qlxge/qls_dbg.c		optional	qlxge pci
+dev/qlxge/qls_dump.c		optional	qlxge pci
+dev/qlxge/qls_hw.c		optional	qlxge pci
+dev/qlxge/qls_ioctl.c		optional	qlxge pci
+dev/qlxge/qls_isr.c		optional	qlxge pci
+dev/qlxge/qls_os.c		optional	qlxge pci
 dev/qlxgb/qla_dbg.c		optional	qlxgb pci
 dev/qlxgb/qla_hw.c		optional	qlxgb pci
 dev/qlxgb/qla_ioctl.c		optional	qlxgb pci

Added: head/sys/dev/qlxge/README.txt
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ head/sys/dev/qlxge/README.txt	Tue Jun 25 17:50:22 2013	(r252206)
@@ -0,0 +1,97 @@
+#$FreeBSD$
+
+			README File
+		QLogic 8100 series Dual Port
+10 Gigabit Ethernet & CNA Adapter Driver for FreeBSD 9.x/10.x
+
+		QLogic Corporation.
+		All rights reserved. 
+
+
+Table of Contents
+1. Package Contents 
+2. OS Support
+3. Supported Features
+4. Using the Driver
+   4.1 Installing the driver
+   4.2 Removing the driver
+5. Driver Parameters
+6. Additional Notes
+7. Contacting Support
+
+1. Package Contents 
+ * Documentation 
+   - README (this document) version:1.0
+   - Release Notes Version:1.0
+ * Driver (if_qlxge.ko)
+	- FreeBSD 9.x/10.x
+ * Firmware: pre-flashed on QLogic adapter;
+
+2. OS Support
+
+The Qlogic 10Gigabit Ethernet/CNA driver is compatible with the 
+following OS platforms:
+ * FreeBSD 9.x/10.x (64-bit) [Intel EM64T, AMD64]
+
+3. Supported Features
+10Gigabit Ethernet NIC/CNA driver supports following features
+
+* Large Segment Offload over TCP IPV4
+* Large Segment Offload over TCP IPV6
+* Receive Side scaling
+* TCP over IPv4 checksum offload
+* UDP over IPv4 checksum offload
+* IPV4 checksum offload
+* TCP over IPv6 checksum offload
+* UDP over IPv6 checksum offload
+* Jumbo frames
+* VLAN Tag
+
+
+4. Using the driver
+
+ 4.1 Installing the driver
+
+   - copy the driver file (if_qlxge.ko) into some directory (say qla_driver)
+   - cd <to qla_driver>
+   - kldload -v ./if_qlxge.ko
+
+ 4.2 Removing the driver
+ 
+  - kldunload if_qlxge
+
+5. Parameters to set prior to installing the driver
+
+   - Add the following lines to /etc/sysctl.conf and reboot the machine prior
+     to installing the driver
+   
+	net.inet.tcp.recvbuf_max=262144
+	net.inet.tcp.recvbuf_inc=16384
+	kern.ipc.nmbclusters=1000000
+	kern.ipc.maxsockbuf=2097152
+	net.inet.tcp.recvspace=131072
+	net.inet.tcp.sendbuf_max=262144
+	net.inet.tcp.sendspace=65536
+ 
+   - If you do not want to reboot the system please run the following commands
+
+	login or su to root
+
+	sysctl net.inet.tcp.recvbuf_max=262144
+	sysctl net.inet.tcp.recvbuf_inc=16384
+	sysctl kern.ipc.nmbclusters=1000000
+	sysctl kern.ipc.maxsockbuf=2097152
+	sysctl net.inet.tcp.recvspace=131072
+	sysctl net.inet.tcp.sendbuf_max=262144
+	sysctl net.inet.tcp.sendspace=65536
+
+7. Contacting Support 
+Please feel free to contact your QLogic approved reseller or QLogic 
+Technical Support at any phase of integration for assistance. QLogic
+Technical Support can be reached by the following methods: 
+Web:    http://support.qlogic.com
+E-mail: support@qlogic.com
+(c) Copyright 2013-14. All rights reserved worldwide. QLogic, the QLogic 
+logo, and the Powered by QLogic logo are registered trademarks of
+QLogic Corporation. All other brand and product names are trademarks 
+or registered trademarks of their respective owners. 

Added: head/sys/dev/qlxge/qls_dbg.c
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ head/sys/dev/qlxge/qls_dbg.c	Tue Jun 25 17:50:22 2013	(r252206)
@@ -0,0 +1,307 @@
+/*
+ * Copyright (c) 2013-2014 Qlogic Corporation
+ * All rights reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * File : qls_dbg.c
+ * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
+ */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include "qls_os.h"
+#include "qls_hw.h"
+#include "qls_def.h"
+#include "qls_inline.h"
+#include "qls_ver.h"
+#include "qls_glbl.h"
+#include "qls_dbg.h"
+
+
+uint32_t qls_dbg_level = 0 ;
+/*
+ * Name: qls_dump_buf32
+ * Function: dumps a buffer as 32 bit words
+ */
+void
+qls_dump_buf32(qla_host_t *ha, const char *msg, void *dbuf32, uint32_t len32)
+{
+        device_t dev;
+	uint32_t i = 0;
+	uint32_t *buf;
+
+        dev = ha->pci_dev;
+	buf = dbuf32;
+
+	device_printf(dev, "%s: %s dump start\n", __func__, msg);
+
+	while (len32 >= 4) {
+		device_printf(dev,"0x%08x:\t0x%08x, 0x%08x, 0x%08x, 0x%08x,\n",
+			i, buf[0], buf[1], buf[2], buf[3]);
+		i += 4 * 4;
+		len32 -= 4;
+		buf += 4;
+	}
+	switch (len32) {
+	case 1:
+		device_printf(dev,"0x%08x: 0x%08x\n", i, buf[0]);
+		break;
+	case 2:
+		device_printf(dev,"0x%08x: 0x%08x 0x%08x\n", i, buf[0], buf[1]);
+		break;
+	case 3:
+		device_printf(dev,"0x%08x: 0x%08x 0x%08x 0x%08x\n",
+			i, buf[0], buf[1], buf[2]);
+		break;
+	default:
+		break;
+	}
+	device_printf(dev, "%s: %s dump end\n", __func__, msg);
+
+	return;
+}
+
+/*
+ * Name: qls_dump_buf16
+ * Function: dumps a buffer as 16 bit words
+ */
+void
+qls_dump_buf16(qla_host_t *ha, const char *msg, void *dbuf16, uint32_t len16)
+{
+        device_t dev;
+	uint32_t i = 0;
+	uint16_t *buf;
+
+        dev = ha->pci_dev;
+	buf = dbuf16;
+
+	device_printf(dev, "%s: %s dump start\n", __func__, msg);
+
+	while (len16 >= 8) {
+		device_printf(dev,"0x%08x: 0x%04x 0x%04x 0x%04x 0x%04x"
+			" 0x%04x 0x%04x 0x%04x 0x%04x\n", i, buf[0],
+			buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]);
+		i += 16;
+		len16 -= 8;
+		buf += 8;
+	}
+	switch (len16) {
+	case 1:
+		device_printf(dev,"0x%08x: 0x%04x\n", i, buf[0]);
+		break;
+	case 2:
+		device_printf(dev,"0x%08x: 0x%04x 0x%04x\n", i, buf[0], buf[1]);
+		break;
+	case 3:
+		device_printf(dev,"0x%08x: 0x%04x 0x%04x 0x%04x\n",
+			i, buf[0], buf[1], buf[2]);
+		break;
+	case 4:
+		device_printf(dev,"0x%08x: 0x%04x 0x%04x 0x%04x 0x%04x\n", i,
+			buf[0], buf[1], buf[2], buf[3]);
+		break;
+	case 5:
+		device_printf(dev,"0x%08x:"
+			" 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x\n", i,
+			buf[0], buf[1], buf[2], buf[3], buf[4]);
+		break;
+	case 6:
+		device_printf(dev,"0x%08x:"
+			" 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x\n", i,
+			buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
+		break;
+	case 7:
+		device_printf(dev,"0x%04x: 0x%04x 0x%04x 0x%04x 0x%04x"
+			" 0x%04x 0x%04x 0x%04x\n", i, buf[0], buf[1],
+			buf[2], buf[3], buf[4], buf[5], buf[6]);
+		break;
+	default:
+		break;
+	}
+	device_printf(dev, "%s: %s dump end\n", __func__, msg);
+
+	return;
+}
+
+/*
+ * Name: qls_dump_buf8
+ * Function: dumps a buffer as bytes
+ */
+void
+qls_dump_buf8(qla_host_t *ha, const char *msg, void *dbuf, uint32_t len)
+{
+        device_t dev;
+	uint32_t i = 0;
+	uint8_t *buf;
+
+        dev = ha->pci_dev;
+	buf = dbuf;
+
+	device_printf(dev, "%s: %s 0x%x dump start\n", __func__, msg, len);
+	
+	while (len >= 16) {
+		device_printf(dev,"0x%08x:"
+			" %02x %02x %02x %02x %02x %02x %02x %02x"
+			" %02x %02x %02x %02x %02x %02x %02x %02x\n", i,
+			buf[0], buf[1], buf[2], buf[3],
+			buf[4], buf[5], buf[6], buf[7],
+			buf[8], buf[9], buf[10], buf[11],
+			buf[12], buf[13], buf[14], buf[15]);
+		i += 16;
+		len -= 16;
+		buf += 16;
+	}
+	switch (len) {
+	case 1:
+		device_printf(dev,"0x%08x: %02x\n", i, buf[0]);
+		break;
+	case 2:
+		device_printf(dev,"0x%08x: %02x %02x\n", i, buf[0], buf[1]);
+		break;
+	case 3:
+		device_printf(dev,"0x%08x: %02x %02x %02x\n",
+			i, buf[0], buf[1], buf[2]);
+		break;
+	case 4:
+		device_printf(dev,"0x%08x: %02x %02x %02x %02x\n", i,
+			buf[0], buf[1], buf[2], buf[3]);
+		break;
+	case 5:
+		device_printf(dev,"0x%08x:"
+			" %02x %02x %02x %02x %02x\n", i,
+			buf[0], buf[1], buf[2], buf[3], buf[4]);
+		break;
+	case 6:
+		device_printf(dev,"0x%08x:"
+			" %02x %02x %02x %02x %02x %02x\n", i,
+			buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
+		break;
+	case 7:
+		device_printf(dev,"0x%08x:"
+			" %02x %02x %02x %02x %02x %02x %02x\n", i,
+			buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6]);
+		break;
+	case 8:
+		device_printf(dev,"0x%08x:"
+			" %02x %02x %02x %02x %02x %02x %02x %02x\n", i,
+			buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
+			buf[7]);
+		break;
+	case 9:
+		device_printf(dev,"0x%08x:"
+			" %02x %02x %02x %02x %02x %02x %02x %02x"
+			" %02x\n", i,
+			buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
+			buf[7], buf[8]);
+		break;
+	case 10:
+		device_printf(dev,"0x%08x:"
+			" %02x %02x %02x %02x %02x %02x %02x %02x"
+			" %02x %02x\n", i,
+			buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
+			buf[7], buf[8], buf[9]);
+		break;
+	case 11:
+		device_printf(dev,"0x%08x:"
+			" %02x %02x %02x %02x %02x %02x %02x %02x"
+			" %02x %02x %02x\n", i,
+			buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
+			buf[7], buf[8], buf[9], buf[10]);
+		break;
+	case 12:
+		device_printf(dev,"0x%08x:"
+			" %02x %02x %02x %02x %02x %02x %02x %02x"
+			" %02x %02x %02x %02x\n", i,
+			buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
+			buf[7], buf[8], buf[9], buf[10], buf[11]);
+		break;
+	case 13:
+		device_printf(dev,"0x%08x:"
+			" %02x %02x %02x %02x %02x %02x %02x %02x"
+			" %02x %02x %02x %02x %02x\n", i,
+			buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
+			buf[7], buf[8], buf[9], buf[10], buf[11], buf[12]);
+		break;
+	case 14:
+		device_printf(dev,"0x%08x:"
+			" %02x %02x %02x %02x %02x %02x %02x %02x"
+			" %02x %02x %02x %02x %02x %02x\n", i,
+			buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
+			buf[7], buf[8], buf[9], buf[10], buf[11], buf[12],
+			buf[13]);
+		break;
+	case 15:
+		device_printf(dev,"0x%08x:"
+			" %02x %02x %02x %02x %02x %02x %02x %02x"
+			" %02x %02x %02x %02x %02x %02x %02x\n", i,
+			buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
+			buf[7], buf[8], buf[9], buf[10], buf[11], buf[12],
+			buf[13], buf[14]);
+		break;
+	default:
+		break;
+	}
+	
+	device_printf(dev, "%s: %s dump end\n", __func__, msg);
+
+	return;
+}
+
+void
+qls_dump_cq(qla_host_t *ha)
+{
+	qls_dump_buf32(ha, "cq_icb", ha->rx_ring[0].cq_icb_vaddr,
+		(sizeof (q81_cq_icb_t) >> 2));
+
+	device_printf(ha->pci_dev, "%s: lbq_addr_tbl_paddr  %p\n", __func__,
+		(void *)ha->rx_ring[0].lbq_addr_tbl_paddr);
+
+	qls_dump_buf32(ha, "lbq_addr_tbl", ha->rx_ring[0].lbq_addr_tbl_vaddr,
+		(PAGE_SIZE >> 2));
+
+	device_printf(ha->pci_dev, "%s: lbq_paddr  %p\n", __func__,
+		(void *)ha->rx_ring[0].lbq_paddr);
+
+	qls_dump_buf32(ha, "lbq", ha->rx_ring[0].lbq_vaddr,
+		(QLA_LBQ_SIZE >> 2));
+
+	device_printf(ha->pci_dev, "%s: sbq_addr_tbl_paddr  %p\n", __func__,
+		(void *)ha->rx_ring[0].sbq_addr_tbl_paddr);
+
+	qls_dump_buf32(ha, "sbq_addr_tbl", ha->rx_ring[0].sbq_addr_tbl_vaddr,
+		(PAGE_SIZE >> 2));
+
+	device_printf(ha->pci_dev, "%s: sbq_paddr  %p\n", __func__,
+		(void *)ha->rx_ring[0].sbq_paddr);
+
+	qls_dump_buf32(ha, "sbq", ha->rx_ring[0].sbq_vaddr,
+		(QLA_SBQ_SIZE >> 2) );
+
+	device_printf(ha->pci_dev, "%s: lb_paddr  %p\n", __func__,
+		(void *)ha->rx_ring[0].lb_paddr);
+
+	return;
+}
+

Added: head/sys/dev/qlxge/qls_dbg.h
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ head/sys/dev/qlxge/qls_dbg.h	Tue Jun 25 17:50:22 2013	(r252206)
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2013-2014 Qlogic Corporation
+ * All rights reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * File : qls_dbg.h
+ * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
+ */
+
+#ifndef _QL_DBG_H_
+#define _QL_DBG_H_
+
+extern uint32_t qls_dbg_level;
+
+extern void qls_dump_buf8(qla_host_t *ha, const char *str, void *dbuf,
+		uint32_t len);
+extern void qls_dump_buf16(qla_host_t *ha, const char *str, void *dbuf,
+		uint32_t len16);
+extern void qls_dump_buf32(qla_host_t *ha, const char *str, void *dbuf,
+		uint32_t len32);
+
+extern void qls_dump_cq(qla_host_t *ha);
+
+
+#ifdef QL_DBG
+
+#define QL_DPRINT1(x)	if (qls_dbg_level & 0x0001) device_printf x
+#define QL_DPRINT2(x)	if (qls_dbg_level & 0x0002) device_printf x
+#define QL_DPRINT4(x)	if (qls_dbg_level & 0x0004) device_printf x
+#define QL_DPRINT8(x)	if (qls_dbg_level & 0x0008) device_printf x
+#define QL_DPRINT10(x)	if (qls_dbg_level & 0x0010) device_printf x
+#define QL_DPRINT20(x)	if (qls_dbg_level & 0x0020) device_printf x
+#define QL_DPRINT40(x)	if (qls_dbg_level & 0x0040) device_printf x
+#define QL_DPRINT80(x)	if (qls_dbg_level & 0x0080) device_printf x
+
+#define QL_DUMP_BUFFER8(h, s, b, n) if (qls_dbg_level & 0x08000000)\
+					qls_dump_buf8(h, s, b, n)
+#define QL_DUMP_BUFFER16(h, s, b, n) if (qls_dbg_level & 0x08000000)\
+					qls_dump_buf16(h, s, b, n)
+#define QL_DUMP_BUFFER32(h, s, b, n) if (qls_dbg_level & 0x08000000)\
+					qls_dump_buf32(h, s, b, n)
+
+#define QL_ASSERT(ha, x, y)	if (!x && !ha->err_inject) panic y
+
+#define QL_DUMP_CQ(ha)		if (qls_dbg_level & 0x08000000) qls_dump_cq(ha)
+
+#else
+
+#define QL_DPRINT1(x)
+#define QL_DPRINT2(x)
+#define QL_DPRINT4(x)
+#define QL_DPRINT8(x)
+#define QL_DPRINT10(x)
+#define QL_DPRINT20(x)
+#define QL_DPRINT40(x)
+#define QL_DPRINT80(x)
+
+#define QL_DUMP_BUFFER8(h, s, b, n)
+#define QL_DUMP_BUFFER16(h, s, b, n)
+#define QL_DUMP_BUFFER32(h, s, b, n)
+
+#define QL_ASSERT(ha, x, y)
+
+#define QL_DUMP_CQ(ha)
+
+#endif
+
+
+#endif /* #ifndef _QL_DBG_H_ */

Added: head/sys/dev/qlxge/qls_def.h
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ head/sys/dev/qlxge/qls_def.h	Tue Jun 25 17:50:22 2013	(r252206)
@@ -0,0 +1,377 @@
+/*
+ * Copyright (c) 2013-2014 Qlogic Corporation
+ * All rights reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * File: qls_def.h
+ * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
+ */
+
+#ifndef _QLS_DEF_H_
+#define _QLS_DEF_H_
+
+/*
+ * structure encapsulating a DMA buffer
+ */
+struct qla_dma {
+        bus_size_t              alignment;
+        uint32_t                size;
+        void                    *dma_b;
+        bus_addr_t              dma_addr;
+        bus_dmamap_t            dma_map;
+        bus_dma_tag_t           dma_tag;
+};
+typedef struct qla_dma qla_dma_t;
+
+/*
+ * structure encapsulating interrupt vectors
+ */
+struct qla_ivec {
+	uint32_t		cq_idx;
+	void			*ha;
+	struct resource		*irq;
+	void			*handle;
+	int			irq_rid;
+};
+typedef struct qla_ivec qla_ivec_t;
+
+/*
+ * Transmit Related Definitions
+ */
+
+#define MAX_TX_RINGS		1
+#define NUM_TX_DESCRIPTORS	1024
+
+#define QLA_MAX_SEGMENTS	64	/* maximum # of segs in a sg list */
+#define QLA_OAL_BLK_SIZE	(sizeof (q81_txb_desc_t) * QLA_MAX_SEGMENTS)
+
+#define QLA_TX_OALB_TOTAL_SIZE	(NUM_TX_DESCRIPTORS * QLA_OAL_BLK_SIZE)
+
+#define QLA_TX_PRIVATE_BSIZE	((QLA_TX_OALB_TOTAL_SIZE + \
+					PAGE_SIZE + \
+					(PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1))
+
+#define QLA_MAX_MTU		9000
+#define QLA_STD_FRAME_SIZE	1514
+#define QLA_MAX_TSO_FRAME_SIZE	((64 * 1024 - 1) + 22)
+
+#define QL_FRAME_HDR_SIZE	(ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN +\
+                sizeof (struct ip6_hdr) + sizeof (struct tcphdr) + 16)
+
+struct qla_tx_buf {
+	struct mbuf	*m_head;
+	bus_dmamap_t	map;
+
+	/* The number of entries in the OAL is determined by QLA_MAX_SEGMENTS */
+	bus_addr_t      oal_paddr;
+	void		*oal_vaddr; 
+};
+typedef struct qla_tx_buf qla_tx_buf_t;
+
+struct qla_tx_ring {
+
+	volatile struct {
+		uint32_t	wq_dma:1,
+				privb_dma:1;
+	} flags;
+
+	qla_dma_t		privb_dma;
+	qla_dma_t		wq_dma;
+
+	qla_tx_buf_t		tx_buf[NUM_TX_DESCRIPTORS];
+	uint64_t		count;
+
+	struct resource         *wq_db_addr;
+	uint32_t		wq_db_offset;
+
+	q81_tx_cmd_t		*wq_vaddr;
+	bus_addr_t		wq_paddr;
+
+	void			*wq_icb_vaddr;
+	bus_addr_t		wq_icb_paddr;
+
+	uint32_t		*txr_cons_vaddr;
+	bus_addr_t		txr_cons_paddr;
+	
+	volatile uint32_t	txr_free; /* # of free entries in tx ring */
+	volatile uint32_t	txr_next; /* # next available tx ring entry */
+	volatile uint32_t	txr_done;
+
+	uint64_t		tx_frames;
+	uint64_t		tx_tso_frames;
+	uint64_t		tx_vlan_frames;
+};
+typedef struct qla_tx_ring qla_tx_ring_t;
+
+/*
+ * Receive Related Definitions
+ */
+
+#define MAX_RX_RINGS		MAX_TX_RINGS
+
+#define NUM_RX_DESCRIPTORS	1024
+#define NUM_CQ_ENTRIES		NUM_RX_DESCRIPTORS
+
+#define QLA_LGB_SIZE		(12 * 1024)
+#define QLA_NUM_LGB_ENTRIES	32
+
+#define QLA_LBQ_SIZE		(QLA_NUM_LGB_ENTRIES * sizeof(q81_bq_addr_e_t)) 
+
+#define QLA_LGBQ_AND_TABLE_SIZE	\
+	((QLA_LBQ_SIZE + PAGE_SIZE + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1))
+
+
+/* Please note that Small Buffer size is determined by max mtu size */
+#define QLA_NUM_SMB_ENTRIES	NUM_RX_DESCRIPTORS
+
+#define QLA_SBQ_SIZE		(QLA_NUM_SMB_ENTRIES * sizeof(q81_bq_addr_e_t))
+
+#define QLA_SMBQ_AND_TABLE_SIZE	\
+	((QLA_SBQ_SIZE + PAGE_SIZE + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1))
+
+struct qla_rx_buf {
+	struct mbuf	*m_head;
+	bus_dmamap_t	map;
+	bus_addr_t      paddr;
+	void		*next;
+};
+typedef struct qla_rx_buf qla_rx_buf_t;
+
+struct qla_rx_ring {
+	volatile struct {
+		uint32_t	cq_dma:1,
+				lbq_dma:1,
+				sbq_dma:1,
+				lb_dma:1;
+	} flags;
+
+	qla_dma_t		cq_dma;
+	qla_dma_t		lbq_dma;
+	qla_dma_t		sbq_dma;
+	qla_dma_t		lb_dma;
+
+	struct lro_ctrl		lro;
+
+	qla_rx_buf_t		rx_buf[NUM_RX_DESCRIPTORS];
+	qla_rx_buf_t		*rxb_free;
+	uint32_t		rx_free;
+	uint32_t		rx_next;
+
+	uint32_t		cq_db_offset;
+
+	void			*cq_icb_vaddr;
+	bus_addr_t		cq_icb_paddr;
+
+	uint32_t		*cqi_vaddr;
+	bus_addr_t		cqi_paddr;
+
+	void			*cq_base_vaddr;
+	bus_addr_t		cq_base_paddr;
+	uint32_t		cq_next; /* next cq entry to process */
+
+	void			*lbq_addr_tbl_vaddr;
+	bus_addr_t		lbq_addr_tbl_paddr;
+
+	void			*lbq_vaddr;
+	bus_addr_t		lbq_paddr;
+	uint32_t		lbq_next; /* next entry in LBQ to process */
+	uint32_t		lbq_free;/* # of entries in LBQ to arm */
+	uint32_t		lbq_in; /* next entry in LBQ to arm */
+
+	void			*lb_vaddr;
+	bus_addr_t		lb_paddr;
+
+	void			*sbq_addr_tbl_vaddr;
+	bus_addr_t		sbq_addr_tbl_paddr;
+
+	void			*sbq_vaddr;
+	bus_addr_t		sbq_paddr;
+	uint32_t		sbq_next; /* next entry in SBQ to process */
+	uint32_t		sbq_free;/* # of entries in SBQ to arm */
+	uint32_t		sbq_in; /* next entry in SBQ to arm */
+
+	uint64_t		rx_int;
+	uint64_t		rss_int;
+};
+typedef struct qla_rx_ring qla_rx_ring_t;
+
+
+#define QLA_WATCHDOG_CALLOUT_TICKS	1
+
+/*
+ * Multicast Definitions
+ */
+typedef struct _qla_mcast {
+	uint16_t	rsrvd;
+	uint8_t		addr[6];
+} __packed qla_mcast_t;
+
+/*
+ * Misc. definitions
+ */
+#define QLA_PAGE_SIZE		4096
+
+/*
+ * Adapter structure contains the hardware independant information of the
+ * pci function.
+ */
+struct qla_host {
+        volatile struct {
+                volatile uint32_t
+			mpi_dma			:1,
+			rss_dma			:1,
+			intr_enable		:1,
+			qla_callout_init	:1,
+			qla_watchdog_active	:1,
+			qla_watchdog_exit	:1,
+			qla_watchdog_pause	:1,
+			lro_init		:1,
+			parent_tag		:1,
+			lock_init		:1;
+        } flags;
+
+	volatile uint32_t	hw_init;
+
+	volatile uint32_t	qla_watchdog_exited;
+	volatile uint32_t	qla_watchdog_paused;
+	volatile uint32_t	qla_initiate_recovery;
+
+	device_t		pci_dev;
+
+	uint8_t			pci_func;
+	uint16_t		watchdog_ticks;
+	uint8_t			resvd;
+
+        /* ioctl related */
+        struct cdev             *ioctl_dev;
+
+	/* register mapping */
+	struct resource		*pci_reg;
+	int			reg_rid;
+
+	struct resource		*pci_reg1;
+	int			reg_rid1;
+
+	int			msix_count;
+	qla_ivec_t              irq_vec[MAX_RX_RINGS];
+
+	/* parent dma tag */
+	bus_dma_tag_t           parent_tag;
+
+	/* interface to o.s */
+	struct ifnet		*ifp;
+
+	struct ifmedia		media;
+	uint16_t		max_frame_size;
+	uint16_t		rsrvd0;
+	uint32_t		msize;
+	int			if_flags;
+
+	/* hardware access lock */
+	struct mtx		hw_lock;
+	volatile uint32_t	hw_lock_held;
+
+	uint32_t		vm_pgsize;
+	/* transmit related */
+	uint32_t		num_tx_rings;
+	qla_tx_ring_t		tx_ring[MAX_TX_RINGS];
+						
+	bus_dma_tag_t		tx_tag;
+	struct task		tx_task;
+	struct taskqueue	*tx_tq;
+	struct callout		tx_callout;
+	struct mtx		tx_lock;
+
+	/* receive related */
+	uint32_t		num_rx_rings;
+	qla_rx_ring_t		rx_ring[MAX_RX_RINGS];
+	bus_dma_tag_t		rx_tag;
+
+	/* stats */
+	uint32_t		err_m_getcl;
+	uint32_t		err_m_getjcl;
+	uint32_t		err_tx_dmamap_create;
+	uint32_t		err_tx_dmamap_load;
+	uint32_t		err_tx_defrag;
+
+	/* mac address related */
+	uint8_t			mac_rcv_mode;
+	uint8_t			mac_addr[ETHER_ADDR_LEN];
+	uint32_t		nmcast;
+	qla_mcast_t		mcast[Q8_MAX_NUM_MULTICAST_ADDRS];
+	
+	/* Link Related */
+        uint8_t			link_up;
+	uint32_t		link_status;
+	uint32_t		link_down_info;
+	uint32_t		link_hw_info;
+	uint32_t		link_dcbx_counters;
+	uint32_t		link_change_counters;
+
+	/* Flash Related */
+	q81_flash_t		flash;
+
+	/* debug stuff */
+	volatile const char 	*qla_lock;
+	volatile const char	*qla_unlock;
+
+	/* Error Recovery Related */
+	uint32_t		err_inject;
+	struct task		err_task;
+	struct taskqueue	*err_tq;
+
+	/* Chip related */
+	uint32_t		rev_id;
+
+	/* mailbox completions */
+	uint32_t		aen[Q81_NUM_AEN_REGISTERS];
+	uint32_t		mbox[Q81_NUM_MBX_REGISTERS];
+	volatile uint32_t       mbx_done;
+
+	/* mpi dump related */
+	qla_dma_t		mpi_dma;
+	qla_dma_t		rss_dma;

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***



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