Date: Mon, 26 Jan 2015 02:58:31 +0000 (UTC) From: Nathan Whitehorn <nwhitehorn@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r277721 - in projects/powernv/powerpc: aim include powernv Message-ID: <201501260258.t0Q2wV7S050182@svn.freebsd.org>
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Author: nwhitehorn Date: Mon Jan 26 02:58:30 2015 New Revision: 277721 URL: https://svnweb.freebsd.org/changeset/base/277721 Log: Make sure to set LPCR[LPES] so that external interrupts set SRR0 and SRR1 instead of HSRR0 and HSRR1. Without this, external interrupt handlers would get the wrong MSR value when executing, causing eventual madness. Sponsored by: FreeBSD Foundation Modified: projects/powernv/powerpc/aim/mp_cpudep.c projects/powernv/powerpc/include/spr.h projects/powernv/powerpc/powernv/platform_powernv.c Modified: projects/powernv/powerpc/aim/mp_cpudep.c ============================================================================== --- projects/powernv/powerpc/aim/mp_cpudep.c Sun Jan 25 23:58:34 2015 (r277720) +++ projects/powernv/powerpc/aim/mp_cpudep.c Mon Jan 26 02:58:30 2015 (r277721) @@ -379,6 +379,13 @@ cpudep_ap_setup() reg = mpc74xx_l1i_enable(); break; + case IBMPOWER7: + case IBMPOWER7PLUS: + case IBMPOWER8: + case IBMPOWER8E: + if (mfmsr() & PSL_HV) + mtspr(SPR_LPCR, mfspr(SPR_LPCR) | LPCR_LPES); + break; default: #ifdef __powerpc64__ if (!(mfmsr() & PSL_HV)) /* Rely on HV to have set things up */ Modified: projects/powernv/powerpc/include/spr.h ============================================================================== --- projects/powernv/powerpc/include/spr.h Sun Jan 25 23:58:34 2015 (r277720) +++ projects/powernv/powerpc/include/spr.h Mon Jan 26 02:58:30 2015 (r277721) @@ -191,6 +191,9 @@ #define FSL_E500mc 0x8023 #define FSL_E5500 0x8024 +#define SPR_LPCR 0x13e /* Logical Partitioning Control */ +#define LPCR_LPES 0x008 /* Bit 60 */ + #define SPR_IBAT0U 0x210 /* .68 Instruction BAT Reg 0 Upper */ #define SPR_IBAT0U 0x210 /* .6. Instruction BAT Reg 0 Upper */ #define SPR_IBAT0L 0x211 /* .6. Instruction BAT Reg 0 Lower */ Modified: projects/powernv/powerpc/powernv/platform_powernv.c ============================================================================== --- projects/powernv/powerpc/powernv/platform_powernv.c Sun Jan 25 23:58:34 2015 (r277720) +++ projects/powernv/powerpc/powernv/platform_powernv.c Mon Jan 26 02:58:30 2015 (r277721) @@ -118,6 +118,9 @@ powernv_attach(platform_t plat) cpu_idle_hook = powernv_cpu_idle; + /* Direct interrupts to SRR instead of HSRR */ + mtspr(SPR_LPCR, mfspr(SPR_LPCR) | LPCR_LPES); + return (0); }
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