Date: Thu, 9 Jun 2011 08:25:57 +0000 (UTC) From: Andriy Gapon <avg@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org Subject: svn commit: r222891 - in stable/8/sys: amd64/amd64 amd64/include i386/i386 i386/include Message-ID: <201106090825.p598PvVF069374@svn.freebsd.org>
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Author: avg Date: Thu Jun 9 08:25:56 2011 New Revision: 222891 URL: http://svn.freebsd.org/changeset/base/222891 Log: MFC r221527: prepare code that does topology detection for amd cpus for bulldozer Modified: stable/8/sys/amd64/amd64/mp_machdep.c stable/8/sys/amd64/include/specialreg.h stable/8/sys/i386/i386/mp_machdep.c stable/8/sys/i386/include/specialreg.h Directory Properties: stable/8/sys/ (props changed) stable/8/sys/amd64/include/xen/ (props changed) stable/8/sys/cddl/contrib/opensolaris/ (props changed) stable/8/sys/contrib/dev/acpica/ (props changed) stable/8/sys/contrib/pf/ (props changed) Modified: stable/8/sys/amd64/amd64/mp_machdep.c ============================================================================== --- stable/8/sys/amd64/amd64/mp_machdep.c Thu Jun 9 06:10:39 2011 (r222890) +++ stable/8/sys/amd64/amd64/mp_machdep.c Thu Jun 9 08:25:56 2011 (r222891) @@ -169,11 +169,34 @@ mem_range_AP_init(void) static void topo_probe_amd(void) { + int core_id_bits; + int id; /* AMD processors do not support HTT. */ - cpu_cores = (amd_feature2 & AMDID2_CMP) != 0 ? - (cpu_procinfo2 & AMDID_CMP_CORES) + 1 : 1; cpu_logical = 1; + + if ((amd_feature2 & AMDID2_CMP) == 0) { + cpu_cores = 1; + return; + } + + core_id_bits = (cpu_procinfo2 & AMDID_COREID_SIZE) >> + AMDID_COREID_SIZE_SHIFT; + if (core_id_bits == 0) { + cpu_cores = (cpu_procinfo2 & AMDID_CMP_CORES) + 1; + return; + } + + /* Fam 10h and newer should get here. */ + for (id = 0; id <= MAX_APIC_ID; id++) { + /* Check logical CPU availability. */ + if (!cpu_info[id].cpu_present || cpu_info[id].cpu_disabled) + continue; + /* Check if logical CPU has the same package ID. */ + if ((id >> core_id_bits) != (boot_cpu_id >> core_id_bits)) + continue; + cpu_cores++; + } } /* Modified: stable/8/sys/amd64/include/specialreg.h ============================================================================== --- stable/8/sys/amd64/include/specialreg.h Thu Jun 9 06:10:39 2011 (r222890) +++ stable/8/sys/amd64/include/specialreg.h Thu Jun 9 08:25:56 2011 (r222891) @@ -233,6 +233,8 @@ * AMD extended function 8000_0008h ecx info */ #define AMDID_CMP_CORES 0x000000ff +#define AMDID_COREID_SIZE 0x0000f000 +#define AMDID_COREID_SIZE_SHIFT 12 /* * CPUID manufacturers identifiers Modified: stable/8/sys/i386/i386/mp_machdep.c ============================================================================== --- stable/8/sys/i386/i386/mp_machdep.c Thu Jun 9 06:10:39 2011 (r222890) +++ stable/8/sys/i386/i386/mp_machdep.c Thu Jun 9 08:25:56 2011 (r222891) @@ -223,11 +223,34 @@ mem_range_AP_init(void) static void topo_probe_amd(void) { + int core_id_bits; + int id; /* AMD processors do not support HTT. */ - cpu_cores = (amd_feature2 & AMDID2_CMP) != 0 ? - (cpu_procinfo2 & AMDID_CMP_CORES) + 1 : 1; cpu_logical = 1; + + if ((amd_feature2 & AMDID2_CMP) == 0) { + cpu_cores = 1; + return; + } + + core_id_bits = (cpu_procinfo2 & AMDID_COREID_SIZE) >> + AMDID_COREID_SIZE_SHIFT; + if (core_id_bits == 0) { + cpu_cores = (cpu_procinfo2 & AMDID_CMP_CORES) + 1; + return; + } + + /* Fam 10h and newer should get here. */ + for (id = 0; id <= MAX_APIC_ID; id++) { + /* Check logical CPU availability. */ + if (!cpu_info[id].cpu_present || cpu_info[id].cpu_disabled) + continue; + /* Check if logical CPU has the same package ID. */ + if ((id >> core_id_bits) != (boot_cpu_id >> core_id_bits)) + continue; + cpu_cores++; + } } /* Modified: stable/8/sys/i386/include/specialreg.h ============================================================================== --- stable/8/sys/i386/include/specialreg.h Thu Jun 9 06:10:39 2011 (r222890) +++ stable/8/sys/i386/include/specialreg.h Thu Jun 9 08:25:56 2011 (r222891) @@ -232,6 +232,8 @@ * AMD extended function 8000_0008h ecx info */ #define AMDID_CMP_CORES 0x000000ff +#define AMDID_COREID_SIZE 0x0000f000 +#define AMDID_COREID_SIZE_SHIFT 12 /* * CPUID manufacturers identifiers
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