Date: Tue, 24 Jan 2017 02:09:30 +0000 (UTC) From: Ian Lepore <ian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r312679 - head/sys/arm/freescale/imx Message-ID: <201701240209.v0O29UDD047838@repo.freebsd.org>
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Author: ian Date: Tue Jan 24 02:09:30 2017 New Revision: 312679 URL: https://svnweb.freebsd.org/changeset/base/312679 Log: Handle imx6 erratum ERR004346... to reboot, clear the SRS bit twice within the same cycle of the 32khz clock. I've never actually noticed this error happening, but it's an easy fix. Modified: head/sys/arm/freescale/imx/imx_machdep.c Modified: head/sys/arm/freescale/imx/imx_machdep.c ============================================================================== --- head/sys/arm/freescale/imx/imx_machdep.c Tue Jan 24 01:39:40 2017 (r312678) +++ head/sys/arm/freescale/imx/imx_machdep.c Tue Jan 24 02:09:30 2017 (r312679) @@ -69,11 +69,18 @@ imx_wdog_cpu_reset(vm_offset_t wdcr_phys * Trigger an immediate reset by clearing the SRS bit in the watchdog * control register. The reset happens on the next cycle of the wdog * 32KHz clock, so hang out in a spin loop until the reset takes effect. + * + * Imx6 erratum ERR004346 says the SRS bit has to be cleared twice + * within the same cycle of the 32khz clock to reliably trigger the + * reset. Writing it 3 times in a row ensures at least 2 of the writes + * happen in the same 32k clock cycle. */ if ((pcr = devmap_ptov(wdcr_physaddr, sizeof(*pcr))) == NULL) { printf("cpu_reset() can't find its control register... locking up now."); } else { *pcr &= ~WDOG_CR_SRS; + *pcr &= ~WDOG_CR_SRS; + *pcr &= ~WDOG_CR_SRS; } for (;;) continue;
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