Date: Tue, 18 Dec 2012 13:30:42 -0700 From: Warner Losh <imp@bsdimp.com> To: Hans Petter Selasky <hselasky@c2i.net> Cc: Oleksandr Tymoshenko <gonzo@freebsd.org>, Andrew Turner <andrew@fubar.geek.nz>, freebsd-usb@freebsd.org Subject: Re: EHCI on armv6 with Write-Back caches Message-ID: <7005E47E-3AF3-4E8E-9AE2-795B7A02D3BB@bsdimp.com> In-Reply-To: <201212180922.22217.hselasky@c2i.net> References: <20121218204931.5322922d@fubar.geek.nz> <201212180922.22217.hselasky@c2i.net>
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On Dec 18, 2012, at 1:22 AM, Hans Petter Selasky wrote: > On Tuesday 18 December 2012 08:49:31 Andrew Turner wrote: >> Hello, >>=20 >> Oleksandr and myself have been looking into why when we enable the >> write-back cache on the PandaBoard there are kernel panics with USB. = We >> have tracked it down to an issue appending the ehci_qh_t to the list = at >> the end of ehci_setup_standard_chain(). >>=20 >> I have a patch at [1] that allows me to run sha256 on a 40MB file = over >> NSF using the built in smsc USB ethernet chip. The problem is I have >> had to place a call to DELAY before EHCI_APPEND_QH. This is obviously >> not the correct solution. >>=20 >> Is anyone able to help me narrow down what is missing? It appears to = be >> a missing cache invalidate or flush somewhere but I haven't been able >> to track down what cache function the DELAY is working around. >>=20 >> Andrew >>=20 >> [1] http://fubar.geek.nz/files/freebsd/ehci_4.diff >=20 > Hi, >=20 > Can you dump the DMA tag belonging to the QH via and check wether it = is mapped=20 > coherent or not. Thes QH- and TD- structures should not be cache = mapped. Else=20 > cache has not been disabled on those pages. busdma doesn't work that way. The coherent flag is just a hint.... Warner > qh->page_cache->tag >=20 > --HPS > _______________________________________________ > freebsd-usb@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-usb > To unsubscribe, send any mail to "freebsd-usb-unsubscribe@freebsd.org"
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