Date: Thu, 7 May 1998 14:29:15 -0700 From: "Fred L. Templin" <templin@erg.sri.com> To: hackers@FreeBSD.ORG, hardware@FreeBSD.ORG Cc: mgorman@isi.edu, templin@erg.sri.com Subject: Missing Receive Data interrupts on a 16550 UART (sio driver)... Message-ID: <199805072129.OAA11997@grayling.erg.sri.com>
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Hi, We're building a custom PC-CARD based on the Zilog Z80182 which "mimics" a 16550 UART at the host interface. We're using the sio.c driver via the SLIP line discipline to talk to the card, and we're able to both transmit and receive data bytes. Whenever the host writes a stream of data bytes to the 16550's Transmit Holding Register (and 16byte transmit FIFO) we get a "Transmit Holding Register Empty" interrupt after the Z182 has finished servicing the FIFO, which is as expected. But, we never get hardware interrupts when the Z182 writes the Receive Buffer Register and/or fills the receive FIFO beyond the trigger level. (I know the Z182 is writing data bytes, because when I enable the sio.c driver's timeout routine to do polling the received data is sitting there in the FIFO waiting for the host to grab it. Has anyone seen anything like this before? Any suggestions on debugging procedures? Thanks, Fred templin@erg.sri.com To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hardware" in the body of the message
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