Date: Fri, 17 Sep 1999 12:05:20 -0700 From: Jason Thorpe <thorpej@nas.nasa.gov> To: Mohit Aron <aron@cs.rice.edu> Cc: freebsd-hackers@FreeBSD.ORG Subject: Re: TLB miss handler for alpha running FreeBSD-4.0 Message-ID: <199909171905.MAA18944@lestat.nas.nasa.gov>
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On Thu, 16 Sep 1999 23:10:21 -0500 (CDT)
Mohit Aron <aron@cs.rice.edu> wrote:
...well, I'm speaking from the NetBSD perspective, but it's the same
in FreeBSD, because both use the OSF/1 PALcode...
> as I understand it, TLB misses on the alpha are handled by the
> software (as opposed to x86 where they are handled in hardware). Can someone
They're handled by software, but not the operating system software (at least
not under the OSF/1 PALcode). TLB misses are serviced by the PALcode, which
presents a 3-level page table interface to the operating system.
> help me with the FreeBSD code. I'm trying to locate the kernel code that
> implements the TLB handler. I'd appreciate if someone can tell me how the
> control is given to the software (i.e. what trap is generated), how the
> handler is called and finally how does the control return back. Thanks,
You should start by reading the `Alpha AXP Architecture Reference Manual',
which is in the Third Edition now, I believe. It will describe to you
in detail the interface the operating system has to the processor.
-- Jason R. Thorpe <thorpej@nas.nasa.gov>
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