Date: Tue, 12 Nov 2019 19:15:16 +0000 (UTC) From: Scott Long <scottl@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r354655 - in head/sys/x86: include x86 Message-ID: <201911121915.xACJFGli028643@repo.freebsd.org>
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Author: scottl Date: Tue Nov 12 19:15:16 2019 New Revision: 354655 URL: https://svnweb.freebsd.org/changeset/base/354655 Log: Add new bit definitions for TSX, related to the TAA issue. The actual mitigation will follow in a future commit. Sponsored by: Intel Modified: head/sys/x86/include/specialreg.h head/sys/x86/x86/identcpu.c Modified: head/sys/x86/include/specialreg.h ============================================================================== --- head/sys/x86/include/specialreg.h Tue Nov 12 18:13:51 2019 (r354654) +++ head/sys/x86/include/specialreg.h Tue Nov 12 19:15:16 2019 (r354655) @@ -491,7 +491,13 @@ #define IA32_ARCH_CAP_SSB_NO 0x00000010 #define IA32_ARCH_CAP_MDS_NO 0x00000020 #define IA32_ARCH_CAP_IF_PSCHANGE_MC_NO 0x00000040 +#define IA32_ARCH_CAP_TSX_CTRL 0x00000080 +#define IA32_ARCH_CAP_TAA_NO 0x00000100 +/* MSR IA32_TSX_CTRL bits */ +#define IA32_TSX_CTRL_RTM_DISABLE 0x00000001 +#define IA32_TSX_CTRL_TSX_CPUID_CLEAR 0x00000002 + /* * CPUID manufacturers identifiers */ @@ -543,6 +549,7 @@ #define MSR_BBL_CR_TRIG 0x11a #define MSR_BBL_CR_BUSY 0x11b #define MSR_BBL_CR_CTL3 0x11e +#define MSR_IA32_TSX_CTRL 0x122 #define MSR_SYSENTER_CS_MSR 0x174 #define MSR_SYSENTER_ESP_MSR 0x175 #define MSR_SYSENTER_EIP_MSR 0x176 Modified: head/sys/x86/x86/identcpu.c ============================================================================== --- head/sys/x86/x86/identcpu.c Tue Nov 12 18:13:51 2019 (r354654) +++ head/sys/x86/x86/identcpu.c Tue Nov 12 19:15:16 2019 (r354655) @@ -1046,6 +1046,8 @@ printcpuinfo(void) "\004SKIP_L1DFL_VME" "\005SSB_NO" "\006MDS_NO" + "\010TSX_CTRL" + "\011TAA_NO" ); }
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