Date: Thu, 02 Sep 1999 20:10:10 +0900 From: NAKAGAWA Yoshihisa <y-nakaga@nwsl.mesh.ad.jp> To: "Steve O'Hara-Smith" <steveo@iol.ie> Cc: freebsd-mobile@FreeBSD.ORG, "Chuck O'Donnell" <cao@bus.net>, Francis Jordan <frankrj@netscape.net> Subject: Re: Purpose of irq's in pcic Message-ID: <199909021110.UAA02030@chandra.eatell.msr.prug.or.jp> In-Reply-To: Your message of "Thu, 02 Sep 1999 11:37:34 %2B0100." <XFMail.990902113734.steveo@iol.ie>
index | next in thread | previous in thread | raw e-mail
> Do you mean one slot at a time by this ? I can certainly use
> either slot on my machine and I don't have enough irq's available to
> use both at once so I can't comment on that.
pccard/pcic.c:pcic_probe()
case 0x84:
sp->controller = PCIC_VLSI;
maybe_vlsi = 1;
break;
VLSI and TI's CardBus controller have same ID 0x84, so maybe_vlsi
flag is set. Normal i82365 compatible PCIC use same base adress
for first slot and second slot, but VLSI use different base
address first slot and second slot.
if (slotnum == 1 && maybe_vlsi && sp->getb(sp, PCIC_ID_REV) != 0x84) {
sp->index += 4;
sp->data += 4;
sp->offset = PCIC_SLOT_SIZE << 1;
}
"sp->index += 4;" is offset adress for VLSI's second slot. This
point is incompatible other PCICs.
If kernel missmatch to VLSI, second slot base address is incorrect.
--
NAKAGAWA, Yoshihisa
y-nakaga@nwsl.mesh.ad.jp
nakagawa@jp.FreeBSD.org
To Unsubscribe: send mail to majordomo@FreeBSD.org
with "unsubscribe freebsd-mobile" in the body of the message
help
Want to link to this message? Use this
URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199909021110.UAA02030>