Date: Thu, 19 Mar 2009 13:08:24 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: cvs-src-old@freebsd.org Subject: cvs commit: src/sys/sparc64/include tte.h src/sys/sparc64/sparc64 pmap.c Message-ID: <200903191308.n2JD8Wvj060636@repoman.freebsd.org>
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marius 2009-03-19 13:08:24 UTC
FreeBSD src repository
Modified files: (Branch: RELENG_7)
sys/sparc64/include tte.h
sys/sparc64/sparc64 pmap.c
Log:
SVN rev 190038 on 2009-03-19 13:08:24Z by marius
MFC: r182767
The physical address space of cheetah-class CPUs has been extended
to 43 bits so update TD_PA_BITS accordingly. For the most part this
increase is transparent to the existing code except for when reading
the physical address from ASI_{D,I}TLB_DATA_ACCESS_REG, which we
only do in the loader and which was already adjusted in r190002, or
from the OFW translations node.
While at it, ensure we are only taking valid OFW mapping entries
into account.
Revision Changes Path
1.16.22.2 +7 -4 src/sys/sparc64/include/tte.h
1.166.2.6 +10 -1 src/sys/sparc64/sparc64/pmap.c
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