Date: Tue, 23 Nov 1999 13:09:44 -0800 (PST) From: Alfred Perlstein <bright@wintelcom.net> To: Alan Cox <alc@cs.rice.edu> Cc: Matthew Dillon <dillon@apollo.backplane.com>, Poul-Henning Kamp <phk@critter.freebsd.dk>, Peter Wemm <peter@netplex.com.au>, Tommy Hallgren <thallgren@yahoo.com>, freebsd-smp@freebsd.org Subject: Re: Matt's new unlock optimiazation Message-ID: <Pine.BSF.4.21.9911231301580.4557-100000@fw.wintelcom.net> In-Reply-To: <19991123142253.M27120@cs.rice.edu>
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On Tue, 23 Nov 1999, Alan Cox wrote: > I would *strongly* recommend that everyone interested in low-level SMP > issues read http://rsim.cs.uiuc.edu/~sadve/Publications/models_tutorial.ps. > This is a tutorial on memory consistency models (with lots > of examples) from IEEE Computer. > > The Intel note that Matt referred to describes a lot of detail > about the model implemented by the x86, but in the end says, > for all practical purposes, you should treat the x86 as though > it implements processor-ordering (or processor consistency). > The tutorial explains precisely what this means to you > as a programmer. I've been reading the SPARC Arch manual for a long time, especially the sections on 'memory models'. I just had no idea that intel implemented these type of optimizations and thought that it always followed the strong memory model (TSO). oops? :) Thank you for the reference I'll be sure to read it throughly before touching any of the asm or consider myself viable as a reviewer for such changes. thanks, -Alfred To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-smp" in the body of the message
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